XRT84L38IB Exar Corporation, XRT84L38IB Datasheet - Page 251

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XRT84L38IB

Manufacturer Part Number
XRT84L38IB
Description
Network Controller & Processor ICs 8 Ch T1/E1 Framer
Manufacturer
Exar Corporation
Datasheet

Specifications of XRT84L38IB

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
REV. 1.0.1
See
Interface block of the framer in 4.096Mbit/s mode.
The timing diagram of input signals to the framer when running at 4.096Mbit/s mode is shown in
This interface mode is the same as running at 2.048 MHz. The only difference is that the Receive Serial Clock
runs four times faster at 8.192MHz.
When the Receive Multiplex Enable bit is set to zero and the Receive Interface Mode Select [1:0] bits are set to
11, the Receive Back-plane interface of framer is running at a clock rate of 8.192MHz.
The interface consists of the following pins:
F
F
5.1.3.3
IGURE
IGURE
Data input (RxSer_n)
Receive Serial Clock Input signal (RxSerClk_n)
RxSerClk (4MHz)
RxSer
RxSync(input)
RxChn[0]/RxSig
RxTSClk(INV)
RxTSb[1]/RxFrTD
Figure 51
Note: The following signals are not aligned with the signals shown above. The RxChClk is derived from 1.544MHz transmit clock.
51. I
52. T
NTERFACING
IMING
T1 Receive Input Interface - 8.192 MHz
below for how to interface the local Terminal Equipment with the Receive Payload Data Output
F
D
IAGRAM OF
Don't Care
Don't Care
Equipment
XRT84L38
Terminal
Don't Care
I
1
NPUT SIGNALS TO THE
2
3
TO LOCAL
4
5
A B
6
RxSerClk_0 (4.096MHz)
RxSer_0
RxMSync_0
RxSync_0
RxSerClk_7 (4.096MHz)
RxSer_7
RxMSync_7
RxSync_7
7
C
D
8
T
1
Don't Care
1
ERMINAL
2
2
3
3
231
4
4
F
5
A B
5
RAMER WHEN RUNNING AT
E
6
6
QUIPMENT USING
7
7
C
8
D
8
1
Don't Care
2
3
4
Data Input
Data Input
5
A B
Interface
Interface
Receive
Payload
Receive
Payload
6
Chn 0
Chn 7
Don't Care
XRT84L38
C
7
4.096M
D
8
Don't care
Don't care
OCTAL T1/E1/J1 FRAMER
4.096M
BIT
/
S
D
BIT
ATA
/
S
1
Don't Care
1
B
2
XRT84L38
2
US
Figure
3
3
4
4
A B
5
5
6
6
52.
C
7
7
D
8
8

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