XRT84L38IB Exar Corporation, XRT84L38IB Datasheet - Page 253

• Manufacturer Part Number: XRT84L38IB
• Description: Network Controller & Processor ICs 8 Ch T1/E1 Framer
• Manufacturer: Exar Corporation

Specifications of XRT84L38IB

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REV. 1.0.1
See
Interface block of the framer in 8.192Mbit/s mode.
The timing diagram of input signals to the framer when running at 8.192Mbit/s mode is shown in
When the Receive Multiplex Enable bit is set to one and the Receive Interface Mode Select [1:0] bits are set to
00, the Receive Back-plane interface of framer is running at a clock rate of 12.352MHz.
The interface consists of the following pins:
•
•
•
•
F
F
5.1.3.4
IGURE
IGURE
Data input (RxSer_n)
Receive Serial Clock Input signal (RxSerClk_n)
Receive Single-frame Synchronization Input signal (RxSync_n)
Receive Input Clock (RxInClk_n)
RxTSb[1]/RxFrTD
RxSerClk (8MHz)
Note: The following signals are not aligned with the signals shown above. The RxChClk is derived from 1.544MHz transmit clock.
Figure 53
RxTSb[0]/RxSig
RxSync(input)
RxTSClk(INV)
53. I
54. T
RxSer
NTERFACING
IMING
T1 Receive Input Interface - Multiplexed 12.352Mbit/s
below for how to interface the local Terminal Equipment with the Receive Payload Data Output
F
D
IAGRAM OF
Don't Care
Equipment
XRT84L38
Terminal
Don't Care
Don't Care
I
NPUT SIGNALS TO THE
1
2
TO LOCAL
3
4
A B
5
RxSerClk_0 (8.192MHz)
RxSer_0
RxMSync_0
RxSync_0
RxSerClk_7 (8.192MHz)
RxSer_7
RxMSync_7
RxSync_7
6
7
C
D
8
T
ERMINAL
Don't Care
1
1
2
2
3
3
233
4
4
F
A B
RAMER WHEN RUNNING AT
5
5
E
6
6
QUIPMENT USING
C
7
7
D
8
8
1
Don't Care
2
3
4
Data Input
Data Input
5
A B
Interface
Interface
Receive
Payload
Receive
Payload
6
Chn 0
Chn 7
Don't Care
XRT84L38
C
7
8.192M
D
8
Don't Care
OCTAL T1/E1/J1 FRAMER
8.192M
Don't care
BIT
/
S
D
BIT
ATA
/
S
1
Don't Care
1
B
2
XRT84L38
2
US
Figure
3
3
4
4
5
A B
5
6
6
7
54.
7
C
D
8
8