XRT84L38IB Exar Corporation, XRT84L38IB Datasheet - Page 399

• Manufacturer Part Number: XRT84L38IB
• Description: Network Controller & Processor ICs 8 Ch T1/E1 Framer
• Manufacturer: Exar Corporation

Specifications of XRT84L38IB

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REV. 1.0.1
•
When the Receive Fractional E1 bit of the Receive Interface Control Register (RICR) is set to 0, this pin is
configured as RxTSb[0]_n pin, it outputs bit 0 of the timeslot number of the E1 PCM data that is receiving.
When the Receive Fractional E1 bit of the Receive Interface Control Register (RICR) is set to 1, this pin is
configured as RxSig_n pin, it acts as an output source for the signaling bits to be received in the inbound E1
frames.
The table below shows configurations of the Receive Fractional E1 bit of the Receive Interface Control
Register (RICR).
RECEIVE INTERFACE CONTROL REGISTER (RICR) (INDIRECT ADDRESS = 0XN0H, 0X20H)
Figure 125
certain timeslot coincides with Bit 3 of the Received serial output data; Signaling Bit B coincides with Bit 2 of
the Received serial output data; Signaling Bit C coincides with Bit 1 of the Received serial output data and
Signaling Bit D coincides with Bit 0 of the Received serial output data.
12.4.1.3
The XRT84L38 framer can be configure to output extracted signaling bits to external equipment through the
Receive Overhead RxOH_n output pins.
The RxOH_n pin can acts as an output source for the signaling bits to be received in the inbound E1 frames.
When this pin is chosen as the output source for the signaling bits, any data presents in time slot 16 of the
incoming E1 frames would be presented onto the pin directly.
Please note that the Signaling bit A of Channel 1-15 coincides with Bit 1 of the PCM data; Signaling bit B
Channel 1-15 coincides with Bit 2 of the PCM data; Signaling bit C Channel 1-15 coincides with Bit 3 of the
PCM; Signaling bit D Channel 1-15 coincides with Bit 4 of the PCM data.
Similarly, the Signaling bit A of Channel 17-31 coincides with Bit 5 of the PCM data; Signaling bit B Channel
17-31 coincides with Bit 6 of the PCM data; Signaling bit C Channel 17-31 coincides with Bit 7 of the PCM;
Signaling bit D Channel 17-31 coincides with Bit 8 of the PCM data.
Figure 126
F
F
IGURE
IGURE
N
RxSig_n - Receive Signaling Output pin
UMBER
B
4
RxSerClk
IT
125. T
126. T
RxSer
RxSig
below is a timing diagram of the RxOH_n output pin.
Receive Fractional
below is a timing diagram of the RxSig_n output pin. Please note that the Signaling Bit A of a
Outputting Signaling Bits from RxOH_n Pin
IMING DIAGRAM OF
IMING DIAGRAM OF THE
B
IT
E1
N
AME
Timeslot 0
A B
B
C
IT
R
R/W
D
X
T
S
YPE
R
IG
X
_
OH_
N
This READ/WRITE bit-field permits the user to determine which one of the
two functions the multiplexed I/O pin of RxTSb[0]_n/RxSig_n is spotting.
0 - This pin is configured as RxTSb[0]_n pin, it outputs bit 0 of the timeslot
number of the E1 PCM data that is receiving.
1 - This pin is configured as RxSig_n pin, it acts as an output source for the
signaling bits to be received in the inbound E1 frames
O
UTPUT PIN
N
O
Timeslot 5
UTPUT PIN
A B
379
C
D
Timeslot 6
Input Data
B
IT
A B
D
ESCRIPTION
C
D
OCTAL T1/E1/J1 FRAMER
Timeslot 16
Input Data
XRT84L38
A B
C
D