XRT84L38IB Exar Corporation, XRT84L38IB Datasheet - Page 72

• Manufacturer Part Number: XRT84L38IB
• Description: Network Controller & Processor ICs 8 Ch T1/E1 Framer
• Manufacturer: Exar Corporation

Specifications of XRT84L38IB

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

XRT84L38
OCTAL T1/E1/J1 FRAMER
REV. 1.0.1
For subsequent write operations, within this burst I/O access, the µC/µP simply repeats steps B.1 through B.3,
as illustrated in
Figure 15
.
F
15. M
µP I
S
W
O
B
I/O C
IGURE
OTOROLA
NTERFACE
IGNALS DURING SUBSEQUENT
RITE
PERATIONS OF A
URST
YCLE
ALE_AS
A[6:0]
Address of Initial Target Register (Offset = 0x00)
CS
D[7:0]
Data Written at Offset = 0x01
Data Written at Offset = 0x02
RD
WR
RDY_DTACK
1.3.2.3.2.2.3
Terminating the Burst I/O Access
The Burst I/O Access will be terminated upon the falling edge of the ALE_AS input signal. At this point the
Framer will cease to internally increment the latched address value. Further, the µC/µP is now free to execute
either a Programmed I/O access or to start another Burst I/O Access with the Framer.
1.4
DMA Read/Write Operations
The XRT84L38 Framer contains two DMA Controller Interfaces which provide support for all eight framers
within the chip. The purpose of the two DMA Controllers is to facilitate the rapid block transfer of data between
an external memory location and the on-chip HDLC buffers via the Microprocessor Interface.
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