XRT84L38IB Exar Corporation, XRT84L38IB Datasheet - Page 70

• Manufacturer Part Number: XRT84L38IB
• Description: Network Controller & Processor ICs 8 Ch T1/E1 Framer
• Manufacturer: Exar Corporation

Specifications of XRT84L38IB

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

XRT84L38
OCTAL T1/E1/J1 FRAMER
The initial write operation of a Motorola-type Write Burst Access is accomplished by executing a Programmed
I/O Write Cycle as summarized below.
b. Perform the remaining write operations, of the burst access.
a. Perform the initial write operation of the burst access.
c. Terminate the burst access operation.
1.3.2.3.2.2.1
A.0
A.1
A.2
A.3
A.4
A.5
A.6
A.7
A.8
A.9
b.
a.
It latches the contents of the bi-directional data bus into the Framer Microprocessor Interface block.
It terminates the Write cycle.
Execute a Single Ordinary (Programmed I/O) Write cycle, as described in Steps A.1 through A.7
below.
Assert the ALE_AS (Address Strobe) input pin by toggling it "Low". This step enables the Address Bus
input drivers (within the Framer).
Place the address of the initial target register or buffer location (within the Framer), on the Address Bus
input pins, A[6:0].
At the same time, the Address-Decoding circuitry (within the user's system) should assert the CS input
pin of the Framer by toggling it "Low". This step enables further communication between the µC/µP
and the Framer Microprocessor Interface block.
After allowing the data on the Address Bus pins to settle (by waiting the appropriate Address Setup
time), the µC/µP should toggle the ALE_AS input pin "High". This step causes the Framer to latch the
contents of the Address Bus into its own circuitry. At this point, the initial address of the burst access
has now been selected.
Further, the µC/µP should indicate that this current bus cycle is a Write operation by toggling the
WR_R/W
The µC/µP should then place the byte or word that it intends to write into the target register, on the bi-
directional data bus, D[7:0].
Next, the µC/µP should initiate the bus cycle by toggling the RD_DS (Data Strobe) input pin "Low".
When the XRT84L38 Framer senses that the
has toggled "Low" it will enable the input drivers of the bi-directional data bus, D[7:0].
After waiting the appropriate amount of time, for this newly placed data to settle on the bi-directional
data bus (e.g., the Data Setup time) the Framer will assert the RDY_DTACK (DTACK) output signal.
After the µP/µC detects the RDY_DTACK signal (from the Framer) it should toggle the RD_DS input
pin "High". This action accomplishes two things:
(R/W) input pin "Low".
Initial Write Operation
WR_R/W
50
input pin is "Low", and that the RD_DS input pin
REV. 1.0.1