XRT84L38IB Exar Corporation, XRT84L38IB Datasheet - Page 419

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XRT84L38IB

Manufacturer Part Number
XRT84L38IB
Description
Network Controller & Processor ICs 8 Ch T1/E1 Framer
Manufacturer
Exar Corporation
Datasheet

Specifications of XRT84L38IB

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
REV. 1.0.1
13.1.4.1.2
Occurrences of transmission-error events indicate the quality of transmission. The occurrences that shall be
detected and reported are:
13.1.4.1.3
The path identification message is used to identify the path between the source terminal and the sink terminal.
The test signal identification message is used by test signal generating equipment.
messages are made up of 82 bytes of data. Byte 1 to 4, 81 and 82 are the message header and bytes 5 to 80
contain six data elements. These messages use the SAPI/TEI value of 15 to differentiate themselves from the
performance report message.
13.1.4.1.4
The message structure of message-oriented signal is shown in Figure 1?2. Two format types are shown in the
figure: format A for frames which are sending performance report message and format B for frames which
containing a path or test signal identification message. The following abbreviations are used:
13.1.4.1.5
All frames shall start and end with the flag sequence consisting of one 0 bit followed by six contiguous 1 bits
and one 0 bit. The flag preceding the address field is defined as the opening flag. The flag following the Frame
Check Sequence (FCS) field is defined as the closing flag. The closing flag may also serve as the opening flag
of the next frame, in some applications. However, all receivers must be able to accommodate receipt of one or
more consecutive flags.
13.1.4.1.6
The address field consists of two octets. A single octet address field is reserved for LAPB operation in order to
allow a single LAPB data link connection to be multiplexed along with LAPD data link connections.
13.1.4.1.7
The address field range is extended by reserving bit 1 of the address field octets to indicate the final octet of
the address field. The presence of a 1 in bit 1 of an address field octet signals that it is the final octet of the
CRC Error Event: A CRC-6 error event is the occurrence of a received CRC code that is not identical to the
corresponding locally calculated code.
Severely Errored Framing Event: A severely-errored-framing event is the occurrence of two or more framing-
bit-pattern errors within a 3-ms period. Contiguous 3-ms intervals shall be examined. The 3-ms period may
coincide with the ESF. The severely-errored-framing event, while similar in form to criteria for declaring a
terminal has lost framing, is only designed as a performance indicator; existing terminal out-of-frame criteria
will continue to serve as the basis for terminal alarms.
Frame-Synchronization-Bit Error Event: A frame-synchronization-bit-error event is the occurrence of a
received framing-bit-pattern not meeting the severely-errored-framing event criteria.
Line-Code Violation event: A line-code violation event is a bipolar violation of the incoming data. A line-code
violation event for an B8ZS-coded signal is the occurrence of a received excessive zeros (EXZ) or a bipolar
violation that is not part of a zero-substitution code.
Controlled Slip Event: A controlled-slip event is a replication, or deletion, of a T1 frame by the receiving
terminal. A controlled slip may occur when there is a difference between the timing of a synchronous
receiving terminal and the received signal.
SAPI: Service Access Point Identifier
C/R: Command or Response
EA: Extended Address
TEI: Terminal Endpoint Identifier
FCS: Frame Check Sequence
Transmission-Error Event
Path and Test Signal Identification Message
Frame Structure
Flag Sequence
Address Field
Address Field Extension bit (EA)
399
OCTAL T1/E1/J1 FRAMER
Both identification
XRT84L38

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