XRT84L38IB Exar Corporation, XRT84L38IB Datasheet - Page 341

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XRT84L38IB

Manufacturer Part Number
XRT84L38IB
Description
Network Controller & Processor ICs 8 Ch T1/E1 Framer
Manufacturer
Exar Corporation
Datasheet

Specifications of XRT84L38IB

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
REV. 1.0.1
When the Transmit Data Conditioning Select [3:0] bits of the Transmit Channel Control Register (TCCR) of a
particular DS0 channel are set to 0100, input DS1 PCM data of this DS0 channel are replaced by the octet
stored in User IDLE Code Register (UCR). The table below shows contents of the User IDLE Code Register.
USER IDLE CODE REGISTER (UCR) (INDIRECT ADDRESS = 0XN02H, 0X20H - 0X37H)
Let us study the following example of applying the User IDLE Code.
In T1DM mode, the time slot 24 of a DS1 frame is used for synchronization and alarm. To generate the T1DM
framing mode externally, the user can do the following:
Upon doing the above, the payload data of channel 24 will be replaced by the T1DM synchronization code
0xBC.
In order to guarantee adequate clock recovery from the received PCM data, a minimum "ones density" must be
maintained. In the case of an all zero channel, that is, if all the incoming PCM data of a particular DS0 channel
from the Terminal Equipment is zero, the raw PCM data is replaced by a certain pattern that no more than
fifteen consecutive zeros will occur. It is known as zero code suppression.
The XRT84L38 framer supports three types of zero code suppression schemes:
The Transmit Zero Code Suppression Select [1:0] bits of the Transmit Channel Control Register (TCCR) of a
particular DS0 channel is used to select which type of zero code suppression scheme is used by the framer.
The table below shows configurations of the Transmit Zero Code Suppression Select [1:0] bits of the Transmit
Channel Control Register (TCCR).
TRANSMIT CHANNEL CONTROL REGISTER (TCCR) (INDIRECT ADDRESS = 0XN2H, 0X00H - 0X1FH)
9.4
9.5
N
N
Write the T1DM synchronization word (0xBC) to the User IDLE Code Register of the time slot 24.
Set the Transmit Data Conditioning Select [3:0] bits of the TCCR of channel 24 to "0100".
AT&T Bit 7 Stuffing - an old coding method that forces Bit 7 (the second LSB of a DS0 channel) to a 1 in an
all zero channel.
GTE Zero Code Suppression - Bit 8 (the LSB of a DS0 channel) is stuffed by 1 in non-signaling frame in an
all zero channel. Otherwise, Bit 7 is stuffed by 1 in signaling frame if the signaling bit is zero.
DDS Zero Code Suppression - an octet with hexadecimal value of 0x98 is used to replace the input data if it
is all zero.
UMBER
UMBER
B
7-0
B
5-4
IT
IT
How to Configure the XRT84L38 Framer to Apply Zero Code Suppression to DS1 Payload Data
on a Per-Channel Basis
How to Configure the XRT84L38 Framer to Transmit Robbed-bit Signaling Information
Code Suppression
User IDLE Code
Transmit Zero
B
B
IT
IT
Select
N
N
AME
AME
B
B
IT
IT
R/W
R/W
T
T
YPE
YPE
These READ/WRITE bit-fields permits the user store any value of IDLE
code into the framer. When the Transmit Data Conditioning Select [3:0] bits
of TCCR register of a particular DS0 channel are set to 0100, the input
DS1 PCM data are replaced by contents of this register and sent to the
Transmit LIU Interface.
00 - The input DS1 PCM data of this DS0 channel is unchanged. No zero
code suppression is used.
01 - AT&T Bit 7 stuffing is used.
10 - GTE zero code suppression is used.
11 - DDS zero code suppression is used.
321
B
B
IT
IT
D
D
ESCRIPTION
ESCRIPTION
OCTAL T1/E1/J1 FRAMER
XRT84L38

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