XRT84L38IB Exar Corporation, XRT84L38IB Datasheet - Page 219

• Manufacturer Part Number: XRT84L38IB
• Description: Network Controller & Processor ICs 8 Ch T1/E1 Framer
• Manufacturer: Exar Corporation

Specifications of XRT84L38IB

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REV. 1.0.1
See
Interface block of the framer in MVIP 8.192Mbit/s mode.
The timing diagram of input signals to the framer when running at 8.192Mbit/s mode is shown in
When the Transmit Multiplex Enable bit is set to one and the Transmit Interface Mode Select [1:0] bits are set to
00, the Transmit Back-plane interface of framer is running at a clock rate of 12.352MHz.
The interface consists of the following pins:
•
•
•
F
F
4.1.3.4
IGURE
IGURE
Data input (TxSer_n)
Transmit Serial Clock Input signal (TxSerClk_n)
Transmit Single-frame Synchronization Input signal (TxSync_n)
TxSerClk (8MHz)
TxSerClk (2MHz)
TxSerClk (INV)
TxSer
TxSync(input)
TxTSb[0]/TxSig
TxTSClk(INV)
TxTSb[1]/TxFrTD
Figure 33
Note: The following signals are not aligned with the signals shown above. The TxTSClk is derived from 1.544MHz transmit clock.
33. I
34. T
NTERFACING
IMING
T1 Transmit Input Interface - Multiplexed 12.352Mbit/s
below for how to interface the local Terminal Equipment with the Transmit Payload Data Input
F
D
IAGRAM OF THE
Don't Care
Don't Care
XRT84L38
Equipment
Terminal
Don't Care
1
2
I
3
TO THE
NPUT
4
5
A B
6
S
7
C
TxSerClk_0
TxSer_0
TxInClk_0 (8.192MHz)
TxSync_0
TxSerClk_7
TxSer_7
TxInClk_7 (8.192MHz)
TxSync_7
IGNALS TO THE
L
D
8
OCAL
1
Don't Care
1
2
2
3
3
T
4
4
ERMINAL
199
A B
5
5
6
6
C
7
7
F
D
8
8
RAMER WHEN RUNNING AT
E
1
Don't Care
QUIPMENT USING
2
3
4
5
A B
Data Input
Data Input
Transmit
Interface
Transmit
Interface
6
Payload
Payload
Chn 0
Chn 7
Don't Care
C
7
XRT84L38
8
D
Don't Care
Don't care
8.192M
OCTAL T1/E1/J1 FRAMER
8.192M
BIT
1
/
1
Don't Care
S
2
2
D
BIT
3
Figure
3
ATA
XRT84L38
4
4
/
S
5
5
A B
B
M
6
6
US
7
ODE
C
7
34.
8
D
8