XRT84L38IB Exar Corporation, XRT84L38IB Datasheet - Page 316
XRT84L38IB
Manufacturer Part Number
XRT84L38IB
Description
Network Controller & Processor ICs 8 Ch T1/E1 Framer
Manufacturer
Exar Corporation
Datasheet
1.XRT84L38.pdf
(453 pages)
Specifications of XRT84L38IB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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XRT84L38
OCTAL T1/E1/J1 FRAMER
of Channel 0. Payload and signaling data of Channel 4-7 are multiplexed onto the Receive Serial Data pin of
Channel 4.
Free-running clocks of 16.384MHz are supplied to the Receive Serial Clock pin of Channel 0 and Channel 4 of
the framer. The Receive High-speed Back-plane Interface of the farmer provides data at rising edge of this
Receive Serial Clock. The local Terminal Equipment then latches incoming serial data at falling edge of the
clock.
The Receive High-speed Back-plane Interface maps four 2.048Mbit/s E1 data streams into this 16.384Mbit/s
data stream as described below:
FIRST OCTET OF 16.384MBIT/S DATA STREAM
THIRD OCTET OF 16.384MBIT/S DATA STREAM
FIFTH OCTET OF 16.384MBIT/S DATA STREAM
SEVENTH OCTET OF 16.384MBIT/S DATA STREAM
X
1. Payload data of four channels are repeated and grouped together in a byte-interleaved way. The first pay-
2. The Receive High-speed Back-plane Interface also multiplexed signaling bits with payload bits and sent
Y
: The Xth payload bit of Channel Y
load bit of Timeslot 0 of Channel 0 is sent first, followed by the second payload bit of Timeslot 0 of Channel
0 and so on. After all the bits of Timeslot 0 of Channel 0 is sent repeatedly, the Terminal Equipment will
start sending the payload bits of Timeslot 0 of Channel 1 and 2. The payload bits of Timeslot 0 of Channel
3 are sent the last.
After the payload bits of Timeslot 0 of all four channels are sent, it comes the payload bits of Timeslot 1 of
Channel 0 and so on. The table below demonstrates how payload bits of four channels are mapped into
the 16.384Mbit/s data stream.
them together through the 16.384Mbit/s data stream.
When the Receive High-speed Back-plane Interface is sending the fifth payload bit of a particular channel,
instead of sending it twice, it inserts the signaling bit A of that particular channel. Similarly, the sixth
B
B
B
B
1
1
1
1
IT
IT
IT
IT
1
0
2
3
0
0
0
0
B
B
B
B
1
1
1
1
IT
IT
IT
IT
0
1
2
3
1
1
1
1
B
B
B
B
2
2
2
2
IT
IT
IT
IT
0
1
2
3
2
2
2
2
B
B
B
B
2
2
2
2
IT
IT
IT
IT
0
1
2
3
3
3
3
3
296
B
B
B
B
3
3
3
3
IT
IT
IT
IT
0
1
2
3
4
4
4
4
B
B
B
B
3
3
3
3
IT
IT
IT
IT
0
1
2
3
5
5
5
5
B
B
B
B
4
4
4
4
IT
IT
IT
IT
0
1
2
3
6
6
6
6
REV. 1.0.1
B
B
B
B
4
4
4
4
IT
IT
IT
IT
0
1
2
3
7
7
7
7
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