m21262 Mindspeed Technologies, m21262 Datasheet - Page 29

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m21262

Manufacturer Part Number
m21262
Description
Cdr/reclocker With 4 1 Input Multiplexer
Manufacturer
Mindspeed Technologies
Datasheet
Table 1-21.
Table 1-22.
21262-DSH-001-C
Pin Number
Pin Number
19
20
25
26
29
30
35
36
23
32
72
71
12
13
43
52
53
14
44
45
42
15
24
47
2
3
4
5
9
8
6
7
High-Speed Signal Pins
Control, Interface, and Alarm Pins (1 of 2)
CTRL_Mode0
CTRL_Mode1
Out_Mode0
Out_Mode1
Pin Name
Pin Name
xJTAG_En
xRegu_En
VddT0/1
VddT2/3
RefClkP
Din0N
Din1N
Din2N
Din3N
DoutN
Din0P
Din1P
Din2P
Din3P
DoutP
MF10
MF11
xRST
MF0
MF1
MF2
MF3
MF4
MF5
MF6
MF7
MF8
MF9
Serial positive data input for channel 0
Serial negative data input for channel 0
Serial positive data input for channel 1
Serial negative data input for channel 1
Serial positive data input for channel 2
Serial negative data input for channel 2
Serial positive data input for channel 3
Serial negative data input for channel 3
Termination pin for Din [1:0]
Termination pin for Din [3:2]
Serial positive data output
Serial negative data output
Multifunction pin for hardwired mode, and serial interface
Multifunction pin for hardwired mode, and serial interface
Multifunction pin for hardwired mode, and serial interface
Multifunction pin for hardwired mode, and serial interface
Multifunction pin for hardwired mode, and serial interface
Multifunction pin for hardwired mode, and serial interface
Multifunction pin for hardwired mode, and serial interface
Multifunction pin for hardwired mode
Multifunction pin for hardwired mode, and JTAG
Multifunction pin for hardwired mode, and JTAG
Multifunction pin for hardwired mode, serial interface, and JTAG
Multifunction pin for hardwired mode, serial interface, and JTAG
Hardwired or serial interface mode control pin
Hardwired or serial interface mode control pin
Output data interface control pin
Output data interface control pin
Reset pin (L = reset)
JTAG testing control pin (L = enable)
Internal voltage regulator control pin (L = enable)
Reference clock positive input
Mindspeed Proprietary and Confidential
Mindspeed Technologies
Function
Function
50Ω pull up to VddT0/1
50Ω pull up to VddT0/1
50Ω pull up to VddT0/1
50Ω pull up to VddT0/1
50Ω pull up to VddT2/3
50Ω pull up to VddT2/3
50Ω pull up to VddT2/3
50Ω pull up to VddT2/3
Terminate to AVdd_Core
Terminate to AVdd_Core
50Ω pull up to AVdd_I/O
50Ω pull up to AVdd_I/O
®
Termination
Internal pull up
Internal pull up
Internal pull up
Internal pull up
Internal pull up
Internal pull up
Internal pull up
Internal pull up
Internal pull up
Internal pull up
Internal pull up
Internal pull up
Internal pull up
Internal pull up
Internal pull down
Internal pull down
Internal pull up
Internal pull up
Internal pull down
Internal pull down
Functional Description
PCML referenced to Avdd_Core
PCML referenced to Avdd_Core
PCML referenced to Avdd_Core
PCML referenced to Avdd_Core
PCML referenced to Avdd_Core
PCML referenced to Avdd_Core
PCML referenced to Avdd_Core
PCML referenced to Avdd_Core
Termination
Termination
O—CML/LVDS
O—CML/LVDS
Default
Type
I—CMOS
I—CMOS
I—CMOS
I—CMOS
I—CMOS
I—CMOS
I—CMOS
I—CMOS
I—CMOS
I—CMOS
I—CMOS
I—CMOS
I—CMOS
I—CMOS
I—CMOS
I—CMOS
I—CMOS
I—CMOS
I—CMOS
I—AC coupled
Type
21

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