m21262 Mindspeed Technologies, m21262 Datasheet - Page 53

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m21262

Manufacturer Part Number
m21262
Description
Cdr/reclocker With 4 1 Input Multiplexer
Manufacturer
Mindspeed Technologies
Datasheet
3.1
Nomenclature:
1. Reserved bits: bits that exist and reserved for future use by Mindspeed.
2. Bits not defined and not reserved do not exist.
3. Do not write to reserved or undefined bits—operation not guaranteed.
4. MSPD internal: defines an internal function. Must always write the default value to MSPD internal bits. When in
3.1.1
Table 3-2.
3.1.2
Table 3-3.
21262-DSH-001-C
Bits
Bits
6:2
7:2
1:0
doubt, read back default value after reset.
7
1
0
Type
Type
R/W
R/W
R/W
R/W
R/W
R/W
Global Control (Globctrl: Address 00h)
Input Multiplexer Setting (mux_ctrl: Address 01h)
Global Control Registers
Global Control
Input Multiplexer Settings
Default
Default
00000b
111001
00b
1b
0b
0b
powerup
MSPD internal
Reserved
clear_alm
Reserved
output
Mindspeed Proprietary and Confidential
Mindspeed Technologies
Label
Label
Powers up the IC by enabling the current references.
0b: Power down the IC
1b: Power up the IC (chip powerup)
N/A
N/A
Clears Alarm_LOL and Alarm_LOL alarm registers (write only) .
0b: Normal operation—latch alarm bits
1b: Clear alarms
NOTE: Upon writing a 1b to this bit, it clears the registers, and user
needs to write a 0b to enable the normal state.
N/A
Determines input channel for output.
00b: Selects input 0
01b: Selects input 1
10b: Selects input 2
11b: Selects input 3
®
Description
Description
Registers
45

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