m21262 Mindspeed Technologies, m21262 Datasheet - Page 40

• Manufacturer Part Number: m21262
• Description: Cdr/reclocker With 4 1 Input Multiplexer
• Manufacturer: Mindspeed Technologies

Table 2-11.
Table 2-12.
21262-DSH-001-C
NOTES:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. After reset (master or soft), initialization takes place, then frequency acquisition.
11. Based on nominal SONET bandwidth (bandwidth can be increased for lower phase lock time).
12. Jitter generation specified per GR-253, utilizing bandpass filter with passband 12 KHz to 20 MHz for STS-48.
13. R
14. Broadband jitter defined as jitter measured on sampling oscilloscope without the use of filters.
15. Maximum value specified incorporates asynchronous aggressors.
16. Jitter transfer of CDR meets the SONET STS-48 mask if loop bandwidth is set to 80% of nominal by writing Phadj_ctrl_N[5:4] = 00b. Jitter
NOTES:
1.
2.
3.
4.
5.
6.
Symbol
Symbol
DT
DT
WRW
NRW
T
T
Specified at recommended operating conditions—see
Jitter tolerance, jitter transfer, and jitter generation specified with input equalization and output pre-emphasis disabled, utilizing PRBS 2
GR-253 test methodologies.
Nominal loop bandwidth for 2.48832 GHz/ DRD.
Bandwidth is proportional to frequency.
For SONET data rates, default meets SONET specifications.
Assume that reference is within ±100 ppm of desired data rate.
Time after power up, reset, or data rate change.
Time from application of valid data to lock within ±20% of lock phase.
Defined as when phase settles to within 20% of lock phase.
transfer at STS-12 (STS-3) exceeds mask by 0.1 dB in frequency range 10 - 25.1 KHz (1.5 - 10 KHz).
Specified at recommended operating conditions—see
Actual time is set with LOL window. Typical is the default value. Minimum and maximum indicate dynamic range.
Assume that reference is ±50 ppm of operating frequency.
Computed for 1.4835 Gbps data rate. Will scale with data rate.
Fixed values.
Specification shown represents deviation from 50% transition density.
—
—
PLL
PLL
j
LOA
LOL
, D
j
, T
j
represent jitter measured to BER of 10
Phase lock time with 100 ppm delta F
Phase lock time with 0 ppm delta F
xLOA decision time
xLOA assertion transition density threshold (xLOA = H to L)
xLOA de-assertion transition density threshold (xLOA = L to H)
xLOL decision time (measurement time)
xLOL assertion frequency threshold (xLOL = H to L)
xLOL de-assertion frequency threshold (xLOL = L to H)
CDR/RCLK High-Speed Performance (2 of 2)
CDR/RCLK Alarm Performance
Parameter
Parameter
Mindspeed Proprietary and Confidential
Mindspeed Technologies
-12
per FC-PI-2 specifications.
Table
Table
2-2.
2-2.
Notes
Notes
9, 11
9, 11
5, 6
5, 6
2, 3
2, 3
5
2
®
Minimum
Minimum
±185
±120
—
—
—
—
—
10
Typical
Typical
±2930
±1955
Product Specifications
12.5
12.5
420
—
—
26
Maximum
Maximum
±250000
±250000
3275
100
50
—
—
—
23
Units
Units
-1, per
ppm
ppm
µs
µs
ns
ns
%
%
32