m21262 Mindspeed Technologies, m21262 Datasheet - Page 63

• Manufacturer Part Number: m21262
• Description: Cdr/reclocker With 4 1 Input Multiplexer
• Manufacturer: Mindspeed Technologies

3.1.24
Table 3-25.
3.1.25
Table 3-26.
21262-DSH-001-C
Bits
Bits
7:6
3:0
7:0
5
4
Type
Type
R/W
R/W
R/W
R/W
R/W
CDR/RCLK Control Register B (RCLK_ctrlB: Address 41h)
CDR/RCLK N Control Register C (RCLK_ctrlC: Address 42h)
CDR/RCLK Control Register B
CDR/RCLK Control Register C
10000000b
Default
Default
0000b
00b
0b
0b
RCLKmode
MSPD internal
Reserved
data_rate
VCO_divr
Mindspeed Proprietary and Confidential
Mindspeed Technologies
Label
Label
Determines state of the PLL.
00b: CDR/RCLK powered up and active
01b: CDR/RCLK powered up and bypassed
10b: CDR/RCLK powered down (no signal through)
11b: CDR/RCLK powered down and bypassed
N/A
N/A
Data rate divider (DRD): this divides down the VCO frequency to the
desired data rate to match input data rate.
0000b = VCO/1
0001b = VCO/2
0010b = VCO/4
0011b = VCO/8
0100b = VCO/12
0101b = VCO/16
0110b = VCO/24
0111b = VCO/32
1000b = VCO/48
NOTE: Please consult F
range of each DRD ratio.
VCO comparison divider (VCD): this divides down the VCO, to
compare it with the scaled reference clock.
Binary value reflects the divider ratio.
1h: Minimum value (VCO /1)
FFh: Maximum value (VCO / 255)
.
.
.
®
vco, max
Description
Description
and F
vco, min
to determine frequency
Registers
55