MC68HC908QY2 MOTOROLA [Motorola, Inc], MC68HC908QY2 Datasheet - Page 155

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MC68HC908QY2

Manufacturer Part Number
MC68HC908QY2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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11.4.4 Continuous Conversion
11.4.5 Accuracy and Precision
11.5 Interrupts
11.6 Low-Power Modes
11.6.1 Wait Mode
MOTOROLA
MC68HC908QY4•MC68HC908QT4•MC68HC908QY2•MC68HC908QT2•MC68HC908QY1•MC68HC908QT1
In the continuous conversion mode, the ADC continuously converts the
selected channel filling the ADC data register (ADR) with new data after
each conversion. Data from the previous conversion will be overwritten
whether that data has been read or not. Conversions will continue until
the ADCO bit is cleared. The COCO bit (ADSCR, $003C) is set after
each conversion and can be cleared by writing the ADC status and
control register or reading of the ADC data register.
The conversion process is monotonic and has no missing codes.
When the AIEN bit is set, the ADC module is capable of generating a
central processor unit (CPU) interrupt after each ADC conversion. A
CPU interrupt is generated if the COCO bit is at logic 0. The COCO bit
is not used as a conversion complete flag when interrupts are enabled.
The following subsections describe the ADC in low-power modes.
The ADC continues normal operation during wait mode. Any enabled
CPU interrupt request from the ADC can bring the microcontroller unit
(MCU) out of wait mode. If the ADC is not required to bring the MCU out
of wait mode, power down the ADC by setting the CH[4:0] bits in ADSCR
to logic 1’s before executing the WAIT instruction.
Analog-to-Digital Converter (ADC)
Analog-to-Digital Converter (ADC)
Interrupts
155

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