MC68HC908QY2 MOTOROLA [Motorola, Inc], MC68HC908QY2 Datasheet - Page 190

• Manufacturer Part Number: MC68HC908QY2
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Computer Operating Properly (COP)
15.3 Functional Description
190
MC68HC908QY4•MC68HC908QT4•MC68HC908QY2•MC68HC908QT2•MC68HC908QY1•MC68HC908QT1
1. See
INTERNAL RESET SOURCES
Section 7. System Integration Module (SIM)
(COPRS FROM CONFIG1)
COPD (FROM CONFIG1)
RESET VECTOR FETCH
COPEN (FROM SIM)
COP RATE SELECT
COPCTL WRITE
COPCTL WRITE
BUSCLKX4
RESET
The COP counter is a free-running 6-bit counter preceded by the 12-bit
system integration module (SIM) counter. If not cleared by software, the
COP counter overflows and generates an asynchronous reset after
2
COP rate select bit, COPRS, in configuration register 1. With a 2
BUSCLKX4 cycle overflow option, a 8-MHz crystal gives a COP timeout
period of 32.766 ms. Writing any value to location $FFFF before an
overflow occurs prevents a COP reset by clearing the COP counter and
stages 12–5 of the SIM counter.
(1)
18
– 2
Figure 15-1. COP Block Diagram
4
or 2
Computer Operating Properly (COP)
COP CLOCK
12-BIT SIM COUNTER
13
– 2
COP COUNTER
for more details.
6-BIT COP COUNTER
CLEAR
4
BUSCLKX4 cycles; depending on the state of the
COP MODULE
SIM MODULE
RESET STATUS REGISTER
SIM RESET CIRCUIT
MOTOROLA
18
– 2
4