MC68HC908QY2 MOTOROLA [Motorola, Inc], MC68HC908QY2 Datasheet - Page 209

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MC68HC908QY2

Manufacturer Part Number
MC68HC908QY2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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17.5.5 Break Flag Control Register
17.6 Low-Power Modes
MOTOROLA
MC68HC908QY4•MC68HC908QT4•MC68HC908QY2•MC68HC908QT2•MC68HC908QY1•MC68HC908QT1
Address: $FE03
The break control register (BFCR) contains a bit that enables software
to clear status bits while the MCU is in a break state.
BCFE — Break Clear Flag Enable Bit
The WAIT and STOP instructions put the MCU in low power-
consumption standby modes. If enabled, the break module will remain
enabled in wait and stop modes. However, since the internal address
bus does not increment in these modes, a break interrupt will never be
triggered.
Reset:
Read:
Write:
This read/write bit enables software to clear status bits by accessing
status registers while the MCU is in a break state. To clear status bits
during the break state, the BCFE bit must be set.
1 = Status bits clearable during break
0 = Status bits not clearable during break
BCFE
Figure 17-8. Break Flag Control Register (BFCR)
Bit 7
0
R
Break Module (BREAK)
= Reserved
6
R
R
5
R
4
R
3
R
2
Break Module (BREAK)
Low-Power Modes
R
1
Bit 0
R
209

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