MC68HC908QY2 MOTOROLA [Motorola, Inc], MC68HC908QY2 Datasheet - Page 192

• Manufacturer Part Number: MC68HC908QY2
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Computer Operating Properly (COP)
15.4.4 Internal Reset
15.4.5 Reset Vector Fetch
15.4.6 COPD (COP Disable)
15.4.7 COPRS (COP Rate Select)
15.5 COP Control Register
192
MC68HC908QY4•MC68HC908QT4•MC68HC908QY2•MC68HC908QT2•MC68HC908QY1•MC68HC908QT1
Address: $FFFF
An internal reset clears the SIM counter and the COP counter.
A reset vector fetch occurs when the vector address appears on the data
bus. A reset vector fetch clears the SIM counter.
The COPD signal reflects the state of the COP disable bit (COPD) in the
configuration register (CONFIG). See
Register
The COPRS signal reflects the state of the COP rate select bit (COPRS)
in the configuration register 1 (CONFIG1). See
Configuration Register
The COP control register (COPCTL) is located at address $FFFF and
overlaps the reset vector. Writing any value to $FFFF clears the COP
counter and starts a new timeout period. Reading location $FFFF
returns the low byte of the reset vector.
Reset:
Read:
Write:
Computer Operating Properly (COP)
Bit 7
(CONFIG).
Figure 15-2. COP Control Register (COPCTL)
6
(CONFIG).
5
LOW BYTE OF RESET VECTOR
CLEAR COP COUNTER
Unaffected by reset
4
Section 5. Configuration
3
Section 5.
2
1
MOTOROLA
Bit 0