MC68HC908QY2 MOTOROLA [Motorola, Inc], MC68HC908QY2 Datasheet - Page 186

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MC68HC908QY2

Manufacturer Part Number
MC68HC908QY2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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Keyboard Interrupt Module (KBI)
14.5 Wait Mode
14.6 Stop Mode
186
MC68HC908QY4•MC68HC908QT4•MC68HC908QY2•MC68HC908QT2•MC68HC908QY1•MC68HC908QT1
The overflow count can be selected from two options defined by the
COPRS bit in CONFIG1. This bit was “borrowed” from the computer
operating properly (COP) using the fact that the COP feature is idle (no
MCU clock available) in stop mode. The typical values of the periodic
wake-up request (5 V, room temperature) are:
The auto wake-up RC oscillator is highly dependent on operating voltage
and temperature.
The wake-up request is latched to allow the interrupt source
identification. The latched value, AWUL, can be read directly from the
bit 6 position of PTA data register. This is a read-only bit which is
occupying an empty bit position on PTA. No PTA associated registers,
such as PTA6 data, PTA6 direction, and PTA6 pullup exist for this bit.
The latch can be cleared by writing to the ACKK bit in the KBSCR
register. Reset also clears the latch. AWUIE bit in KBI interrupt enable
register (see
The keyboard module remains active in wait mode. Clearing the
IMASKK bit in the keyboard status and control register enables keyboard
interrupt requests to bring the MCU out of wait mode.
The keyboard module remains active in stop mode. Clearing the
IMASKK bit in the keyboard status and control register enables keyboard
interrupt requests to bring the MCU out of stop mode.
COPRS = 0: 512 ms
COPRS = 1: 16 ms
Keyboard Interrupt Module (KBI)
Figure
14-2) has no effect on AWUL reading.
MOTOROLA

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