MC68HC908QY2 MOTOROLA [Motorola, Inc], MC68HC908QY2 Datasheet - Page 164

• Manufacturer Part Number: MC68HC908QY2
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Input/Output (I/O) Ports
12.3.2 Data Direction Register A
164
MC68HC908QY4•MC68HC908QT4•MC68HC908QY2•MC68HC908QT2•MC68HC908QY1•MC68HC908QT1
NOTE:
Address: $0004
Data direction register A (DDRA) determines whether each port A pin is
an input or an output. Writing a logic 1 to a DDRA bit enables the output
buffer for the corresponding port A pin; a logic 0 disables the output
buffer.
DDRA[5:0] — Data Direction Register A Bits
Avoid glitches on port A pins by writing to the port A data register before
changing data direction register A bits from 0 to 1.
Reset:
Read:
Write:
These read/write bits control port A data direction. Reset clears
DDRA[5:0], configuring all port A pins as inputs.
1 = Corresponding port A pin configured as output
0 = Corresponding port A pin configured as input
Bit 7
0
0
Figure 12-3. Data Direction Register A (DDRA)
Input/Output (I/O) Ports
= Unimplemented
6
0
0
DDRA5
5
0
DDRA4
4
0
DDRA3
3
0
2
0
0
DDRA1
1
0
MOTOROLA
DDRA0
Bit 0
0