MC68HC908QY2 MOTOROLA [Motorola, Inc], MC68HC908QY2 Datasheet - Page 157

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MC68HC908QY2

Manufacturer Part Number
MC68HC908QY2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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11.8.1 ADC Status and Control Register
MOTOROLA
MC68HC908QY4•MC68HC908QT4•MC68HC908QY2•MC68HC908QT2•MC68HC908QY1•MC68HC908QT1
Address: $003C
The following paragraphs describe the function of the ADC status and
control register (ADSCR).
COCO — Conversions Complete Bit
AIEN — ADC Interrupt Enable Bit
ADCO — ADC Continuous Conversion Bit
Reset:
Read:
Write:
When the AIEN bit is a logic 0, the COCO is a read-only bit which is
set each time a conversion is completed. This bit is cleared whenever
ADSCR is written or whenever the ADR is read. Reset clears this bit.
When the AIEN bit is a logic 1 (CPU interrupt enabled), the COCO is
a read-only bit, and will always be logic 0 when read.
When this bit is set, an interrupt is generated at the end of an ADC
conversion. The interrupt signal is cleared when ADR is read or
ADSCR is written. Reset clears the AIEN bit.
When set, the ADC will convert samples continuously and update
ADR at the end of each conversion. Only one conversion is allowed
when this bit is cleared. Reset clears the ADCO bit.
Figure 11-3. ADC Status and Control Register (ADSCR)
1 = Conversion completed (AIEN = 0)
0 = Conversion not completed (AIEN = 0)
1 = ADC interrupt enabled
0 = ADC interrupt disabled
1 = Continuous ADC conversion
0 = One ADC conversion
COCO
Bit 7
Analog-to-Digital Converter (ADC)
0
= Unimplemented
AIEN
6
0
ADCO
5
0
CH4
4
1
CH3
3
1
Analog-to-Digital Converter (ADC)
CH2
2
1
Input/Output Registers
CH1
1
1
Bit 0
CH0
1
157

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