MC68HC908QY2 MOTOROLA [Motorola, Inc], MC68HC908QY2 Datasheet - Page 169

• Manufacturer Part Number: MC68HC908QY2
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

12.4.3 Port B Input Pullup Enable Register
MOTOROLA
MC68HC908QY4•MC68HC908QT4•MC68HC908QY2•MC68HC908QT2•MC68HC908QY1•MC68HC908QT1
Address:
When DDRBx is a logic 1, reading address $0001 reads the PTBx data
latch. When DDRBx is a logic 0, reading address $0001 reads the
voltage level on the pin. The data latch can always be written, regardless
of the state of its data direction bit.
of the port B pins.
The port B input pullup enable register (PTBPUE) contains a software
configurable pullup device for each of the eight port B pins. Each bit is
individually configurable and requires the corresponding data direction
register, DDRBx, be configured as input. Each pullup device is
automatically and dynamically disabled when its corresponding DDRBx
bit is configured as output.
Reset:
DDRB
1. X = don’t care
2. Hi-Z = high impedance
3. Writing affects data register, but does not affect the input.
Read:
Write:
Bit
Figure 12-9. Port B Input Pullup Enable Register (PTBPUE)
0
1
PTBPUE7 PTBPUE6 PTBPUE5 PTBPUE4 PTBPUE3 PTBPUE2 PTBPUE2 PTBPUE0
$000C
Bit 7
PTB
X
0
Bit
X
(1)
Input/Output (I/O) Ports
= Unimplemented
Input, Hi-Z
6
0
Table 12-2. Port B Pin Functions
I/O Pin
Output
Mode
(2)
5
0
Accesses to DDRB
DDRB7–DDRB0
DDRB7–DDRB0
Read/Write
Table 12-2
4
0
3
0
summarizes the operation
Read
2
0
Pin
Pin
Input/Output (I/O) Ports
Accesses to PTB
PTB7–PTB0
PTB7–PTB0
1
0
Write
Bit 0
Port B
0
(3)
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