DSPIC30F6010-30I/PF Microchip Technology, DSPIC30F6010-30I/PF Datasheet - Page 136

• Manufacturer Part Number: DSPIC30F6010-30I/PF
• Description: IC DSPIC MCU/DSP 144K 80TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6010-30I/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 144KB (48K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 68
• Flash Memory Size: 144KB
• Supply Voltage Range: 2.5V To 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300019 - BOARD DEMO DSPICDEM 80L STARTERAC164314 - MODULE SKT FOR PM3 80PFDM300020 - BOARD DEV DSPICDEM MC1 MOTORCTRLAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F601030IPF

dsPIC30F6010
20.8
FIGURE 20-3:
DS70119E-page 134
The analog input model of the 10-bit ADC is
shown in Figure 20-3. The total sampling time
for the ADC is a function of the internal amplifier
settling time, device V
itor charge time.
For the ADC to meet its specified accuracy, the
charge holding capacitor (C
allowed to fully charge to the voltage level on the
analog input pin. The source impedance (R
the interconnect impedance (R
nal sampling switch (R
to directly affect the time required to charge the
capacitor C
the analog sources must therefore be small
enough to fully charge the holding capacitor
within the chosen sample time. To minimize the
effects of pin leakage currents on the accuracy
of the A/D converter, the maximum recom-
mended source impedance, R
the analog input channel is selected (changed),
this sampling function must be completed prior
ADC Acquisition Requirements
Note: C
HOLD
Legend: C
VA
PIN
. The combined impedance of
Rs
ADC ANALOG INPUT MODEL
value depends on device package and is not tested. Effect of C
V
I leakage
R
R
C
DD
ANx
T
PIN
IC
SS
HOLD
SS
C
PIN
and the holding capac-
) impedance combine
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch resistance
= sample/hold capacitance (from DAC)
IC
HOLD
S
various junctions
, is 5 k . After
), and the inter-
) must be
V
DD
V
V
T
T
= 0.6V
= 0.6V
S
),
R
I leakage
IC
500 nA
250
to starting the conversion. The internal holding
capacitor will be in a discharged state prior to
each sample operation.
The user must allow at least 1 T
sampling time, T
allow each sample to be acquired. This sample
time may be controlled manually in software by
setting/clearing the SAMP bit, or it may be auto-
matically controlled by the ADC. In an automatic
configuration, the user must allow enough time
between conversion triggers so that the mini-
mum sample time can be satisfied. Refer to the
Electrical Specifications for T
time requirements.
Sampling
Switch
R
SS
PIN
R
negligible if Rs £ 5 kW.
SS
V
SS
C
= DAC capacitance
= 4.4 pF
SAMP
HOLD
3 k
© 2006 Microchip Technology Inc.
, between conversions to
AD
AD
and sample
period of