DSPIC30F6010-30I/PF Microchip Technology, DSPIC30F6010-30I/PF Datasheet - Page 146

• Manufacturer Part Number: DSPIC30F6010-30I/PF
• Description: IC DSPIC MCU/DSP 144K 80TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6010-30I/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 144KB (48K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 68
• Flash Memory Size: 144KB
• Supply Voltage Range: 2.5V To 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300019 - BOARD DEMO DSPICDEM 80L STARTERAC164314 - MODULE SKT FOR PM3 80PFDM300020 - BOARD DEV DSPICDEM MC1 MOTORCTRLAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F601030IPF

dsPIC30F6010
If the oscillator has a very slow start-up time coming
out of POR, BOR or Sleep, it is possible that the
PWRT timer will expire before the oscillator has
started. In such cases, the FSCM will be activated and
the FSCM will initiate a clock failure trap, and the
COSC<1:0> bits are loaded with FRC oscillator selec-
tion. This will effectively shut-off the original oscillator
that was trying to start.
The user may detect this situation and restart the
oscillator in the clock fail trap ISR.
Upon a clock failure detection, the FSCM module will
initiate a clock switch to the FRC Oscillator as follows:
1.
2.
3.
For the purpose of clock switching, the clock sources
are sectioned into four groups:
1.
2.
3.
4.
The user can switch between these functional groups,
but cannot switch between options within a group. If the
primary group is selected, then the choice within the
group is always determined by the FPR<3:0> Configu-
ration bits.
The OSCCON register holds the Control and Status
bits related to clock switching.
• COSC<1:0>: Read only status bits always reflect
• NOSC<1:0>: Control bits which are written to
• LOCK: The LOCK status bit indicates a PLL lock.
• CF: Read only status bit indicating if a clock fail
• OSWEN: Control bit changes from a ‘0’ to a ‘1’
DS70119E-page 144
the current oscillator group in effect.
indicate the new oscillator group of choice.
- On POR and BOR, COSC<1:0> and
detect has occurred.
when a clock transition sequence is initiated.
Clearing the OSWEN control bit will abort a clock
transition in progress (used for hang-up
situations).
The COSC bits (OSCCON<13:12>) are loaded
with the FRC Oscillator selection value.
CF bit is set (OSCCON<3>).
OSWEN control bit (OSCCON<0>) is cleared.
Primary
Secondary
Internal FRC
Internal LPRC
NOSC<1:0> are both loaded with the
Configuration bit values FOS<1:0>.
If Configuration bits FCKSM<1:0> = 1x, then the clock
switching and fail-safe clock monitor functions are
disabled. This is the default Configuration bit setting.
If clock switching is disabled, then the FOS<1:0> and
FPR<3:0> bits directly control the oscillator selection
and the COSC<1:0> bits do not control the clock
selection. However, these bits will reflect the clock
source selection.
21.2.8
A write to the OSCCON register is intentionally made
difficult because it controls clock switching and clock
scaling.
To write to the OSCCON low byte, the following code
sequence must be executed without any other
instructions in between:
• Byte Write “0x46” to OSCCON low
• Byte Write “0x57” to OSCCON low
Byte Write is allowed for one instruction cycle. Write the
desired value or use bit manipulation instruction.
To write to the OSCCON high byte, the following
instructions must be executed without any other
instructions in between:
• Byte Write “0x78” to OSCCON high
• Byte Write “0x9A” to OSCCON high
Byte Write is allowed for one instruction cycle. Write the
desired value or use bit manipulation instruction.
Note:
The application should not attempt to
switch to a clock of frequency lower than
100 KHz when the fail-safe clock monitor is
enabled. If such clock switching is
performed, the device may generate an
oscillator fail trap and switch to the Fast RC
oscillator.
PROTECTION AGAINST
ACCIDENTAL WRITES TO OSCCON
© 2006 Microchip Technology Inc.