DSPIC30F6010-30I/PF Microchip Technology, DSPIC30F6010-30I/PF Datasheet - Page 164

• Manufacturer Part Number: DSPIC30F6010-30I/PF
• Description: IC DSPIC MCU/DSP 144K 80TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6010-30I/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 144KB (48K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 68
• Flash Memory Size: 144KB
• Supply Voltage Range: 2.5V To 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300019 - BOARD DEMO DSPICDEM 80L STARTERAC164314 - MODULE SKT FOR PM3 80PFDM300020 - BOARD DEV DSPICDEM MC1 MOTORCTRLAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F601030IPF

dsPIC30F6010
TABLE 23-2:
DS70119E-page 162
Base
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
Instr
#
DEC2
DISI
DIV
DIVF
DO
ED
EDAC
EXCH
FBCL
FF1L
FF1R
GOTO
INC
INC2
IOR
LAC
LNK
LSR
MAC
Mnemonic
Assembly
DEC2
DEC2
DEC2
DISI
DIV.S
DIV.SD
DIV.U
DIV.UD
DIVF
DO
DO
ED
EDAC
EXCH
FBCL
FF1L
FF1R
GOTO
GOTO
INC
INC
INC
INC2
INC2
INC2
IOR
IOR
IOR
IOR
IOR
LAC
LNK
LSR
LSR
LSR
LSR
LSR
MAC
MAC
INSTRUCTION SET OVERVIEW
f
f,WREG
Ws,Wd
#lit14
Wm,Wn
Wm,Wn
Wm,Wn
Wm,Wn
#lit14,Expr
Wn,Expr
Wm*Wm,Acc,Wx,Wy,Wxd
Wm*Wm,Acc,Wx,Wy,Wxd
Wns,Wnd
Ws,Wnd
Ws,Wnd
Ws,Wnd
Expr
Wn
f
f,WREG
Ws,Wd
f
f,WREG
Ws,Wd
f
f,WREG
#lit10,Wn
Wb,Ws,Wd
Wb,#lit5,Wd
Wso,#Slit4,Acc
#lit14
f
f,WREG
Ws,Wd
Wb,Wns,Wnd
Wb,#lit5,Wnd
Wm*Wn,Acc,Wx,Wxd,Wy,Wyd,
AWB
Wm*Wm,Acc,Wx,Wxd,Wy,Wyd
Assembly Syntax
Wm,Wn
f = f -2
WREG = f -2
Wd = Ws - 2
Disable Interrupts for k instruction cycles
Signed 16/16-bit Integer Divide
Signed 32/16-bit Integer Divide
Unsigned 16/16-bit Integer Divide
Unsigned 32/16-bit Integer Divide
Signed 16/16-bit Fractional Divide
Do code to PC+Expr, lit14+1 times
Do code to PC+Expr, (Wn)+1 times
Euclidean Distance (no accumulate)
Euclidean Distance
Swap Wns with Wnd
Find Bit Change from Left (MSb) Side
Find First One from Left (MSb) Side
Find First One from Right (LSb) Side
Go to address
Go to indirect
f = f + 1
WREG = f + 1
Wd = Ws + 1
f = f + 2
WREG = f + 2
Wd = Ws + 2
f = f .IOR. WREG
WREG = f .IOR. WREG
Wd = lit10 .IOR. Wd
Wd = Wb .IOR. Ws
Wd = Wb .IOR. lit5
Load Accumulator
Link frame pointer
f = Logical Right Shift f
WREG = Logical Right Shift f
Wd = Logical Right Shift Ws
Wnd = Logical Right Shift Wb by Wns
Wnd = Logical Right Shift Wb by lit5
Multiply and Accumulate
Square and Accumulate
Description
© 2006 Microchip Technology Inc.
words
# of
1
1
1
1
1
1
1
1
1
2
2
1
1
1
1
1
1
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
cycle
# of
18
18
18
18
18
s
1
1
1
1
2
2
1
1
1
1
1
1
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
None
N,Z,C, OV
N,Z,C, OV
N,Z,C, OV
N,Z,C, OV
N,Z,C, OV
None
None
OA,OB,OAB,
SA,SB,SAB
OA,OB,OAB,
SA,SB,SAB
None
C
C
C
None
None
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
N,Z
N,Z
N,Z
N,Z
N,Z
OA,OB,OAB,
SA,SB,SAB
None
C,N,OV,Z
C,N,OV,Z
C,N,OV,Z
N,Z
N,Z
OA,OB,OAB,
SA,SB,SAB
OA,OB,OAB,
SA,SB,SAB
Status Flags
Affected