DSPIC30F6010-30I/PF Microchip Technology, DSPIC30F6010-30I/PF Datasheet - Page 216

• Manufacturer Part Number: DSPIC30F6010-30I/PF
• Description: IC DSPIC MCU/DSP 144K 80TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6010-30I/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 144KB (48K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 68
• Flash Memory Size: 144KB
• Supply Voltage Range: 2.5V To 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300019 - BOARD DEMO DSPICDEM 80L STARTERAC164314 - MODULE SKT FOR PM3 80PFDM300020 - BOARD DEV DSPICDEM MC1 MOTORCTRLAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F601030IPF

dsPIC30F6010
PWM Operation During CPU Idle Mode.............................. 93
PWM Operation During CPU Sleep Mode .......................... 93
PWM Output and Polarity Control ....................................... 92
PWM Output Override......................................................... 91
PWM Period ........................................................................ 88
PWM Special Event Trigger ................................................ 93
PWM Time Base ................................................................. 87
PWM Update Lockout ......................................................... 93
Q
QEA/QEB Input Characteristics ........................................ 189
QEI Module
Quadrature Decoder Timing Requirements ...................... 189
Quadrature Encoder Interface (QEI) Module ...................... 79
Quadrature Encoder Interface Interrupts ............................ 82
Quadrature Encoder Interface Logic ................................... 80
R
Reader Response ............................................................. 217
Reset......................................................................... 139, 145
Reset Sequence.................................................................. 39
Reset Timing Characteristics ............................................ 181
Reset Timing Requirements.............................................. 182
Resets
S
Simple Capture Event Mode
Simple OC/PWM Mode Timing Requirements.................. 187
Simple Output Compare Match Mode................................. 76
Simple PWM Mode ............................................................. 76
Single Pulse PWM Operation.............................................. 91
Software Simulator (MPLAB SIM)..................................... 154
Software Stack Pointer, Frame Pointer............................... 12
DS70119E-page 214
Output Pin Control ...................................................... 92
Complementary Output Mode ..................................... 91
Synchronization .......................................................... 91
Postscaler ................................................................... 93
Continuous Up/Down Counting Modes ....................... 87
Double Update Mode .................................................. 88
Free Running Mode .................................................... 87
Postscaler ................................................................... 88
Prescaler ..................................................................... 88
Single Shot Mode........................................................ 87
External Clock Timing Requirements........................ 185
Index Pulse Timing Characteristics........................... 190
Index Pulse Timing Requirements ............................ 190
Operation During CPU Idle Mode ............................... 81
Operation During CPU Sleep Mode ............................ 81
Register Map............................................................... 83
Timer Operation During CPU Idle Mode ..................... 82
Timer Operation During CPU Sleep Mode.................. 81
Reset Sources ............................................................ 39
BOR, Programmable................................................. 147
POR .......................................................................... 145
POR with Long Crystal Start-up Time ....................... 147
POR, Operating without FSCM and PWRT .............. 147
Capture Buffer Operation ............................................ 72
Capture Prescaler ....................................................... 71
Hall Sensor Mode ....................................................... 72
Input Capture in CPU Idle Mode ................................. 72
Timer2 and Timer3 Selection Mode ............................ 72
Input Pin Fault Protection............................................ 76
Period.......................................................................... 77
CALL Stack Frame...................................................... 27
SPI Mode
SPI Module ......................................................................... 95
SPI Operation During CPU Idle Mode ................................ 97
SPI Operation During CPU Sleep Mode............................. 97
Status Register ................................................................... 12
System Integration............................................................ 139
T
Temperature and Voltage Specifications
Timer1 Module.................................................................... 57
Timer2 and Timer3 Selection Mode.................................... 76
Timer2/3 Module................................................................. 61
Timer4/5 Module................................................................. 67
TimerQ (QEI Module) External Clock Timing Characteristics.
Slave Select Synchronization ..................................... 97
SPI1 Register Map...................................................... 98
SPI2 Register Map...................................................... 98
Framed SPI Support ................................................... 97
Operating Function Description .................................. 95
SDOx Disable ............................................................. 95
Timing Characteristics
Timing Requirements
Word and Byte Communication .................................. 95
Overview................................................................... 139
Register Map ............................................................ 152
AC............................................................................. 176
DC ............................................................................ 167
16-bit Asynchronous Counter Mode ........................... 57
16-bit Synchronous Counter Mode ............................. 57
16-bit Timer Mode....................................................... 57
Gate Operation ........................................................... 58
Interrupt ...................................................................... 59
Operation During Sleep Mode .................................... 58
Prescaler .................................................................... 58
Real-Time Clock ......................................................... 59
Register Map .............................................................. 60
32-bit Synchronous Counter Mode ............................. 61
32-bit Timer Mode....................................................... 61
ADC Event Trigger...................................................... 64
Gate Operation ........................................................... 64
Interrupt ...................................................................... 64
Operation During Sleep Mode .................................... 64
Register Map .............................................................. 65
Timer Prescaler .......................................................... 64
Register Map .............................................................. 69
185
Master Mode (CKE = 0).................................... 191
Master Mode (CKE = 1).................................... 192
Slave Mode (CKE = 1).............................. 193, 194
Master Mode (CKE = 0).................................... 191
Master Mode (CKE = 1).................................... 192
Slave Mode (CKE = 0)...................................... 193
Slave Mode (CKE = 1)...................................... 195
RTC Interrupts .................................................... 59
RTC Oscillator Operation ................................... 59
© 2006 Microchip Technology Inc.