DSPIC30F6010-30I/PF Microchip Technology, DSPIC30F6010-30I/PF Datasheet - Page 92

• Manufacturer Part Number: DSPIC30F6010-30I/PF
• Description: IC DSPIC MCU/DSP 144K 80TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6010-30I/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 144KB (48K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 68
• Flash Memory Size: 144KB
• Supply Voltage Range: 2.5V To 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300019 - BOARD DEMO DSPICDEM 80L STARTERAC164314 - MODULE SKT FOR PM3 80PFDM300020 - BOARD DEV DSPICDEM MC1 MOTORCTRLAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F601030IPF

dsPIC30F6010
15.6
In the Complementary mode of operation, each pair of
PWM outputs is obtained by a complementary PWM
signal. A dead time may be optionally inserted during
device switching, when both outputs are inactive for a
short period (Refer to Section 15.7 “Dead-Time Gen-
erators”).
In Complementary mode, the duty cycle comparison
units are assigned to the PWM outputs as follows:
• PDC1 register controls PWM1H/PWM1L outputs
• PDC2 register controls PWM2H/PWM2L outputs
• PDC3 register controls PWM3H/PWM3L outputs
• PDC4 register controls PWM4H/PWM4L outputs
The Complementary mode is selected for each PWM
I/O pin pair by clearing the appropriate PMODx bit in the
PWMCON1 SFR. The PWM I/O pins are set to
Complementary mode by default upon a device Reset.
15.7
Dead-time generation may be provided when any of
the PWM I/O pin pairs are operating in the Comple-
mentary Output mode. The PWM outputs use Push-
Pull drive circuits. Due to the inability of the power out-
put devices to switch instantaneously, some amount of
time must be provided between the turn off event of one
PWM output in a complementary pair and the turn on
event of the other transistor.
The PWM module allows two different dead times to be
programmed. These two dead times may be used in
one of two methods described below to increase user
flexibility:
• The PWM output signals can be optimized for dif-
• The two dead times can be assigned to individual
15.7.1
Each complementary output pair for the PWM module
has a 6-bit down counter that is used to produce the
dead-time insertion. As shown in Figure 15-4, each
dead-time unit has a rising and falling edge detector
connected to the duty cycle comparison output.
DS70119E-page 90
ferent turn off times in the high side and low side
transistors in a complementary pair of transistors.
The first dead time is inserted between the turn off
event of the lower transistor of the complementary
pair and the turn on event of the upper transistor.
The second dead time is inserted between the
turn off event of the upper transistor and the turn
on event of the lower transistor.
PWM I/O pin pairs. This operating mode allows
the PWM module to drive different transistor/load
combinations with each complementary PWM I/O
pin pair.
Complementary PWM Operation
Dead-Time Generators
DEAD-TIME GENERATORS
15.7.2
The DTCON2 SFR contains control bits that allow the
dead times to be assigned to each of the complemen-
tary outputs. Table 15-1 summarizes the function of
each dead-time selection control bit.
TABLE 15-1:
15.7.3
The amount of dead time provided by each dead-time
unit is selected by specifying the input clock prescaler
value and a 6-bit unsigned value. The amount of dead
time provided by each unit may be set independently.
Four input clock prescaler selections have been pro-
vided to allow a suitable range of dead times, based on
the device operating frequency. The clock prescaler
option may be selected independently for each of the
two dead-time values. The dead-time clock prescaler
values are selected using the DTAPS<1:0> and
DTBPS<1:0> control bits in the DTCON1 SFR. One of
four clock prescaler options (T
may be selected for each of the dead-time values.
After the prescaler values are selected, the dead time
for each unit is adjusted by loading two 6-bit unsigned
values into the DTCON1 SFR.
The dead-time unit prescalers are cleared on the fol-
lowing events:
• On a load of the down timer due to a duty cycle
• On a write to the DTCON1 or DTCON2 registers.
• On any device Reset.
DTS1A
DTS1I
DTS2A
DTS2I
DTS3A
DTS3I
DTS4A
DTS4I
comparison edge event.
Note:
Bit
Selects PWM1L/PWM1H active edge dead time.
Selects PWM1L/PWM1H inactive edge
dead time.
Selects PWM2L/PWM2H active edge dead time.
Selects PWM2L/PWM2H inactive edge
dead time.
Selects PWM3L/PWM3H active edge dead time.
Selects PWM3L/PWM3H inactive edge
dead time.
Selects PWM4L/PWM4H active edge dead time.
Selects PWM4L/PWM4H inactive edge
dead time.
DEAD-TIME ASSIGNMENT
DEAD-TIME RANGES
The user should not modify the DTCON1
or DTCON2 values while the PWM mod-
ule is operating (PTEN = 1). Unexpected
results may occur.
DEAD-TIME SELECTION BITS
© 2006 Microchip Technology Inc.
Function
CY
, 2T
CY
, 4T
CY
or 8T
CY
)