DSPIC30F6010-30I/PF Microchip Technology, DSPIC30F6010-30I/PF Datasheet - Page 21

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DSPIC30F6010-30I/PF

Manufacturer Part Number
DSPIC30F6010-30I/PF
Description
IC DSPIC MCU/DSP 144K 80TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F6010-30I/PF

Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
144KB (48K x 24)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of I/o's
68
Flash Memory Size
144KB
Supply Voltage Range
2.5V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM300019 - BOARD DEMO DSPICDEM 80L STARTERAC164314 - MODULE SKT FOR PM3 80PFDM300020 - BOARD DEV DSPICDEM MC1 MOTORCTRLAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F601030IPF

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F6010-30I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
DSPIC30F6010-30I/PF
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
3.0
3.1
The program address space is 4M instruction words. It
is addressable by the 23-bit PC, table instruction
Effective Address (EA), or data space EA, when
program space is mapped into data space, as defined
by Table 3-1. Note that the program space address is
incremented by two between successive program
words, in order to provide compatibility with data space
addressing.
User program space access is restricted to the lower
4M instruction word address range (0x000000 to
0x7FFFFE), for all accesses other than TBLRD/TBLWT,
which use TBLPAG<7> to determine user or configura-
tion space access. In Table 3-1, Read/Write instruc-
tions, bit 23 allows access to the Device ID, the User ID
and the Configuration bits. Otherwise, bit 23 is always
clear.
© 2006 Microchip Technology Inc.
Note: This data sheet summarizes features of this group
of dsPIC30F devices and is not intended to be a complete
reference source. For more information on the CPU,
peripherals, register descriptions and general device
functionality, refer to the “dsPIC30F Family Reference
Manual” (DS70046). For more information on the device
instruction set and programming, refer to the “dsPIC30F/
33F Programmer’s Reference Manual” (DS70157).
MEMORY ORGANIZATION
Program Address Space
FIGURE 3-1:
Reset - GOTO Instruction
Alternate Vector Table
Reset - Target Address
dsPIC30F6010
Interrupt Vector Table
Device Configuration
Program Memory
(48K instructions)
UNITID (32 instr.)
Data EEPROM
DEVID (2)
User Flash
Reserved
(Read 0’s)
(4 Kbytes)
Registers
Reserved
Reserved
Reserved
Reserved
PROGRAM SPACE
MEMORY MAP FOR
dsPIC30F6010
DS70119E-page 19
000000
000002
000004
00007E
000080
000084
0000FE
000100
017FFE
018000
7FEFFE
7FF000
7FFFFE
800000
8005BE
8005C0
8005FE
800600
F7FFFE
F80000
F8000E
F80010
FEFFFE
FF0000
FFFFFE
Vector Tables

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