AT91RM9200-QU-002 Atmel, AT91RM9200-QU-002 Datasheet - Page 224

IC ARM9 MCU 208 PQFP

AT91RM9200-QU-002

Manufacturer Part Number
AT91RM9200-QU-002
Description
IC ARM9 MCU 208 PQFP
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91RM9200-QU-002

Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
POR
Number Of I /o
122
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
208-MQFP, 208-PQFP
Processor Series
AT91Rx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
2-Wire, EBI, I2S, SPI, UART, USART
Maximum Clock Frequency
180 MHz
Number Of Programmable I/os
122
Number Of Timers
10 bit
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91RM9200-EK
Minimum Operating Temperature
- 40 C
Eeprom Memory
0 Bytes
Input Output
122
Interface
EBI/EMI, UART/USART
Ios
122
Memory Type
ROM
Number Of Bits
32
Package Type
208-pin PQFP
Programmable Memory
128K Bytes
Timers
3-16-bit
Voltage, Range
1.65-1.95 V
Cpu Family
91R
Device Core
ARM920T
Device Core Size
32b
Frequency (max)
180MHz
Total Internal Ram Size
16KB
# I/os (max)
122
Number Of Timers - General Purpose
6
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
1.95/3.6V
Operating Supply Voltage (min)
1.65/3V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
208
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Figure 20-8. Burst Flash Controller with No Burst Enable Handling
20.6.4.4
224
Selection Signal
Page Mode
Address Bus
Internal BFC
Clock (2)
Internal
Internal
BFAVD
BFBAA
D[15:0]
D[15:0]
A[24:0]
Output
BFWE
BFOE
BFCS
BFCK
Input
AT91RM9200
Continuous Burst Reads
(1) Only if Multiplexed Address & Data Busses
(2) Master Clock Mode (BFCC =1)
Address (1)
The BFC performs continuous burst reads. It is also possible to program page sizes from 16
bytes up to 1024 bytes. This is done by setting the appropriate value in the PAGES field of the
“Burst Flash Controller Mode Register” on page
of the BFC (Suspend). When the BFC is requested again, a new burst is started even though
the requested address is sequential to the previously requested address.
AVL
A0
Address (D0)
D0
Sampling
D0
Sampling
D1
D1
A1
D2
OEL = 1
Burst Suspend
Address Valid Latency = 4 BFCK cycles
Output Enable Latency (OEL) = 1 BFCK cycle
227.
Address (1)
No Burst Output Enable Handling (BFOEH = 0)
Signal Control Advance Address (BAAEN = 1)
Begin New Burst
Address (D2)
AVL
A2
1768I–ATARM–09-Jul-09
Sampling
D2
D2
Sampling
D3
D3
A3
D4

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