AT91RM9200-QU-002 Atmel, AT91RM9200-QU-002 Datasheet - Page 37

• Manufacturer Part Number: AT91RM9200-QU-002
• Description: IC ARM9 MCU 208 PQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91RM9200-QU-002

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: POR
• Number Of I /o: 122
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: ROM
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-MQFP, 208-PQFP
• Processor Series: AT91Rx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: 2-Wire, EBI, I2S, SPI, UART, USART
• Maximum Clock Frequency: 180 MHz
• Number Of Programmable I/os: 122
• Number Of Timers: 10 bit
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91RM9200-EK
• Minimum Operating Temperature: - 40 C
• Eeprom Memory: 0 Bytes
• Input Output: 122
• Interface: EBI/EMI, UART/USART
• Ios: 122
• Memory Type: ROM
• Number Of Bits: 32
• Package Type: 208-pin PQFP
• Programmable Memory: 128K Bytes
• Timers: 3-16-bit
• Voltage, Range: 1.65-1.95 V
• Cpu Family: 91R
• Device Core: ARM920T
• Device Core Size: 32b
• Frequency (max): 180MHz
• Total Internal Ram Size: 16KB
• # I/os (max): 122
• Number Of Timers - General Purpose: 6
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 1.95/3.6V
• Operating Supply Voltage (min): 1.65/3V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 208
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

11.3.4.1
1768I–ATARM–09-Jul-09
Modes and Exception Handling
Table 11-1.
Registers R0 to R7 are unbanked registers, thus each of them refers to the same 32-bit physical
register in all processor modes. They are general-purpose registers, with no special uses man-
aged by the architecture, and can be used wherever an instruction allows a general-purpose
register to be specified.
Registers R8 to R14 are banked registers. This means that each of them depends of the current
processor mode.
For further details, see the ARM Architecture Reference Manual, Rev. DDI0100E.
All exceptions have banked registers for R14 and R13.
After an exception, R14 holds the return address for exception processing. This address is used
both to return after the exception is processed and to address the instruction that caused the
exception.
R13 is banked across exception modes to provide each exception handler with a private stack
pointer.
The fast interrupt mode also banks registers 8 to 12 so that interrupt processing can begin with-
out the need to save these registers.
User and
System
CPSR
Mode
R10
R11
R12
R13
R14
R5
R6
R7
R8
PC
R9
ARM9TDMI Modes and Register Layout (Continued)
SPSR_SVC
Supervisor
R13_SVC
R14_SVC
CPSR
Mode
R10
R11
R12
PC
R5
R6
R7
R8
R9
R13_ABORT
R14_ABORT
Abort Mode
SPSR_ABO
CPSR
R10
R11
R12
PC
RT
R5
R6
R7
R8
R9
R13_UNDEF
R14_UNDEF
SPSR_UND
Undefined
CPSR
Mode
R10
R11
R12
PC
R5
R6
R7
R8
R9
EF
SPSR_IRQ
Interrupt
R13_IRQ
R14_IRQ
CPSR
Mode
Mode-specific banked
R10
R11
R12
PC
R5
R6
R7
R8
R9
registers
AT91RM9200
SPSR_FIQ
Interrupt
R10_FIQ
R11_FIQ
R12_FIQ
R13_FIQ
R14_FIQ
R8_FIQ
R9_FIQ
CPSR
Mode
Fast
PC
R5
R6
R7
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