AT91RM9200-QU-002 Atmel, AT91RM9200-QU-002 Datasheet - Page 88

IC ARM9 MCU 208 PQFP

AT91RM9200-QU-002

Manufacturer Part Number
AT91RM9200-QU-002
Description
IC ARM9 MCU 208 PQFP
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91RM9200-QU-002

Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
POR
Number Of I /o
122
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
208-MQFP, 208-PQFP
Processor Series
AT91Rx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
2-Wire, EBI, I2S, SPI, UART, USART
Maximum Clock Frequency
180 MHz
Number Of Programmable I/os
122
Number Of Timers
10 bit
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91RM9200-EK
Minimum Operating Temperature
- 40 C
Eeprom Memory
0 Bytes
Input Output
122
Interface
EBI/EMI, UART/USART
Ios
122
Memory Type
ROM
Number Of Bits
32
Package Type
208-pin PQFP
Programmable Memory
128K Bytes
Timers
3-16-bit
Voltage, Range
1.65-1.95 V
Cpu Family
91R
Device Core
ARM920T
Device Core Size
32b
Frequency (max)
180MHz
Total Internal Ram Size
16KB
# I/os (max)
122
Number Of Timers - General Purpose
6
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
1.95/3.6V
Operating Supply Voltage (min)
1.65/3V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
208
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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13.3.3
13.3.3.1
13.3.3.2
88
AT91RM9200
Bootloader Sequence
Device Initialization
Download Procedure
The Boot Program performs device initialization followed by the download procedure. If unsuc-
cessful, the upload is done via the USB or debug serial port.
Initialization follows the steps described below:
Table 13-2.
The download procedure checks for a valid boot on several devices. The first device checked is
a serial DataFlash connected to the NPCS0 of the SPI, followed by the serial EEPROM con-
nected to the TWI and by an 8-bit parallel memory connected on NCS0 of the External Bus
Interface.
3.0
4.433619
6.144
7.864320
12.0
16.0
1. PLL setup
2. Stacks setup for each ARM mode
3. Main oscillator frequency detection
4. Interrupt controller setup
5. C variables initialization
6. Branch main function
– PLLB is initialized to generate a 48 MHz clock necessary to use the USB Device. A
register located in the Power Management Controller (PMC) determines the
frequency of the main oscillator and thus the correct factor for the PLLB.
Table 13-2
Crystals Supported by Software Auto-detection (MHz)
defines the crystals supported by the Boot Program.
3.2768
4.9152
6.4
8.0
12.288
17.734470
3.6864
5.0
6.5536
9.8304
13.56
18.432
3.84
5.24288
7.159090
10.0
14.31818
20.0
1768I–ATARM–09-Jul-09
4.0
6.0
7.3728
11.05920
14.7456

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