AT91RM9200-QU-002 Atmel, AT91RM9200-QU-002 Datasheet - Page 606

IC ARM9 MCU 208 PQFP

AT91RM9200-QU-002

Manufacturer Part Number
AT91RM9200-QU-002
Description
IC ARM9 MCU 208 PQFP
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91RM9200-QU-002

Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
POR
Number Of I /o
122
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
208-MQFP, 208-PQFP
Processor Series
AT91Rx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
2-Wire, EBI, I2S, SPI, UART, USART
Maximum Clock Frequency
180 MHz
Number Of Programmable I/os
122
Number Of Timers
10 bit
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91RM9200-EK
Minimum Operating Temperature
- 40 C
Eeprom Memory
0 Bytes
Input Output
122
Interface
EBI/EMI, UART/USART
Ios
122
Memory Type
ROM
Number Of Bits
32
Package Type
208-pin PQFP
Programmable Memory
128K Bytes
Timers
3-16-bit
Voltage, Range
1.65-1.95 V
Cpu Family
91R
Device Core
ARM920T
Device Core Size
32b
Frequency (max)
180MHz
Total Internal Ram Size
16KB
# I/os (max)
122
Number Of Timers - General Purpose
6
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
1.95/3.6V
Operating Supply Voltage (min)
1.65/3V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
208
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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AT91RM9200
Frame Format Extensions
Preamble and Start of Frame Delimiter (SFD)
Destination Address
Source Address
Length/Type
LLC Data
FCS Field
Note:
The packets are Manchester-encoded and -decoded and transferred serially using NRZ data
with a clock. All fields are of fixed length except for the data field. The MAC generates and
appends the preamble, SFD and CRC fields during transmission.
The preamble and SFD fields are stripped during reception.
The preamble field is used to acquire bit synchronization with an incoming packet. When trans-
mitted, each packet contains 62 bits of alternating 1,0 preamble. Some of this preamble is lost
as the packet travels through the network. Byte alignment is performed with the Start of Frame
Delimiter (SFD) pattern that consists of two consecutive 1's.
The destination address (DA) indicates the destination of the packet on the network and is used
to filter unwanted packets. There are three types of address formats: physical, multicast and
broadcast. The physical address is a unique address that corresponds only to a single node. All
physical addresses have an MSB of 0.
Multicast addresses begin with an MSB of 1. The MAC filters multicast addresses using a stan-
dard hashing algorithm that maps all multicast addresses into a 6-bit value. This 6-bit value
indexes a 64-bit array that filters the value. If the address consists of all ones, it is a broadcast
address, indicating that the packet is intended for all nodes.
The source address (SA) is the physical address of the node that sent the packet. Source
addresses cannot be multicast or broadcast addresses. This field is passed to buffer memory.
If the value of this field is less than or equal to 1500, then the Length/Type field indicates the
number of bytes in the subsequent LLC Data field. If the value of this field is greater than or
equal to 1536, then the Length/Type field indicates the nature of the MAC client protocol (proto-
col type).
The data field consists of anywhere from 46 to 1500 bytes. Messages longer than 1500 bytes
need to be broken into multiple packets. Messages shorter than 46 bytes require appending a
pad to bring the data field to the minimum length of 46 bytes. If the data field is padded, the num-
ber of valid data bytes is indicated in the length field.
The Frame Check Sequence (FCS) is a 32-bit CRC field, calculated and appended to a packet
during transmission to allow detection of errors when a packet is received. During reception,
error free packets result in a specific pattern in the CRC generator. Packets with improper CRC
will be rejected.
The original Ethernet standards defined the minimum frame size as 64 bytes and the maximum
as 1518 bytes. These numbers include all bytes from the Destination MAC Address field through
the Frame Check Sequence field. The Preamble and Start Frame Delimiter fields are not
included when quoting the size of a frame. The IEEE 802.3ac standard extended the maximum
Frame Length between 64 bytes and 1518 bytes.
1768I–ATARM–09-Jul-09

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