AT91RM9200-QU-002 Atmel, AT91RM9200-QU-002 Datasheet - Page 40

IC ARM9 MCU 208 PQFP

AT91RM9200-QU-002

Manufacturer Part Number
AT91RM9200-QU-002
Description
IC ARM9 MCU 208 PQFP
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91RM9200-QU-002

Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
POR
Number Of I /o
122
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
208-MQFP, 208-PQFP
Processor Series
AT91Rx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
2-Wire, EBI, I2S, SPI, UART, USART
Maximum Clock Frequency
180 MHz
Number Of Programmable I/os
122
Number Of Timers
10 bit
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91RM9200-EK
Minimum Operating Temperature
- 40 C
Eeprom Memory
0 Bytes
Input Output
122
Interface
EBI/EMI, UART/USART
Ios
122
Memory Type
ROM
Number Of Bits
32
Package Type
208-pin PQFP
Programmable Memory
128K Bytes
Timers
3-16-bit
Voltage, Range
1.65-1.95 V
Cpu Family
91R
Device Core
ARM920T
Device Core Size
32b
Frequency (max)
180MHz
Total Internal Ram Size
16KB
# I/os (max)
122
Number Of Timers - General Purpose
6
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
1.95/3.6V
Operating Supply Voltage (min)
1.65/3V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
208
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Table 11-3.
40
Mnemonic
LDRSH
LDMIA
LDRH
PUSH
LDRB
MOV
ADD
CMP
AND
EOR
MUL
SUB
ASR
LDR
TST
LSL
BX
B
AT91RM9200
Thumb Instruction Mnemonic List
Operation
Move
Add
Subtract
Compare
Test
Logical AND
Logical Exclusive OR
Logical Shift Left
Arithmetic Shift Right
Multiply
Branch and Exchange
Load Word
Load Half Word
Load Byte
Load Signed Halfword
Load Multiple
Push Register to stack
Branch
Stack Pointer (ARM Register 13). Further instructions allow limited access to the ARM register 8
to 15.
For further details, see the ARM920T Technical Reference Manual, Rev. DDI0151C.
Table 11-3
gives the Thumb instruction mnemonic list.
MVN
Mnemonic
LDRSB
STMIA
STRH
STRB
CMN
ADC
NEG
ORR
ROR
SBC
STR
POP
LSR
SWI
BIC
BL
Operation
Move Not
Add with Carry
Subtract with Carry
Compare Negated
Negate
Bit Clear
Logical (inclusive) OR
Logical Shift Right
Rotate Right
Branch and Link
Software Interrupt
Store Word
Store Half Word
Store Byte
Load Signed Byte
Store Multiple
Pop Register from stack
1768I–ATARM–09-Jul-09

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