MPC561MZP56 Freescale Semiconductor, MPC561MZP56 Datasheet - Page 527
MPC561MZP56
Manufacturer Part Number
MPC561MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet
1.MPC561MZP56.pdf
(1420 pages)
Specifications of MPC561MZP56
Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Controller Family/series
POWER 5xx
No. Of I/o's
56
Ram Memory Size
31KB
Cpu Speed
56MHz
No. Of Timers
32
Embedded Interface Type
QSPI, SCI, UART
No. Of Pwm Channels
12
Rohs Compliant
No
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
CAN, JTAG, QSPI, SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC561MZP56
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MPC561MZP56R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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13.6.2
This section contains some conversion timing examples. Example 1 below shows the timing for basic
conversions where the following is assumed:
Freescale Semiconductor
•
•
•
•
•
Q1 begins with CCW0 and ends with CCW3
CCW0 has pause bit set
CCW1 does not have pause bit set
External trigger rise-edge for Q1
CCW4 = BQ2 and Q2 is disabled
Q2:
Conversion Timing Schemes
T2
C1
(Trigger Captured, Response Delayed After Freeze)
C2
Q2:
Q1:
T2
C3
T1
C1
C1
C4
Q1:
T1
C2
C2
MPC561/MPC563 Reference Manual, Rev. 1.2
T2
Figure 13-43. CCW Freeze Situation 17
Figure 13-44. CCW Freeze Situation 18
Figure 13-45. CCW Freeze Situation 19
C1
PF2
C3
C2
T2
(Triggers Ignored)
FREEZE
FREEZE
FREEZE
C4
C3
Q2:
CF1
C1
C4
T2
CF1
C3
C2
C4
QADC64E Legacy Mode Operation
CF2
C4
C3
CF2
C4
QADC S17
CF2
QADC S18
QADC S19
13-63
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