ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 153

• Manufacturer Part Number: ATMEGA64M1-15MZ
• Description: MCU AVR 64KB FLASH 3PSC 32-VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64M1-15MZ

• Package / Case: 32-VQFN
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Eeprom Size: 2K x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Connectivity: CAN, LIN, SPI, UART/USART
• Core Size: 8-Bit
• Processor Series: ATMEGA64x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Lead Free Status / Rohs Status: Details

14.16.3
14.16.4
14.16.5
14.16.6
14.16.7
7647G–AVR–09/11
PSC Output Compare SA Register – POCRnSAH and POCRnSAL
PSC Output Compare RA Register – POCRnRAH and POCRnRAL
PSCOutput Compare SB Register – POCRnSBH and POCRnSBL
PSC Output Compare RB Register – POCR_RBH and POCR_RBL
PSC Configuration Register – PCNF
Note:
The Output Compare Registers RA, RB, SA and SB contain a 12-bit value that is continuously
compared with the PSC counter value. A match can be used to generate an Output Compare
interrupt, or to generate a waveform output on the associated pin.
The Output Compare Registers are 16bit and 12-bit in size. To ensure that both the high and
low bytes are written simultaneously when the CPU writes to these registers, the access is
performed using an 8-bit temporary high byte register (TEMP). This temporary register is
shared by all the other 16-bit registers.
• Bit 7:6 - not use
not use
• Bit 5 – PULOCK: PSC Update Lock
When this bit is set, the Output Compare Registers POCRnRA, POCRnSA, POCRnSB,
POCR_RB and the PSC Output Configuration Registers POC can be written without disturb-
ing the PSC cycles. The update of the PSC internal registers will be done if the PULOCK bit is
released to zero.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
n = 0 to 2 according to module number.
R/W
R/W
R/W
R/W
R
7
–
0
7
–
0
7
–
0
7
–
0
7
0
-
R/W
R/W
R/W
R/W
6
–
0
6
–
0
6
–
0
6
–
0
R
6
0
-
PULOCK
R/W
R/W
R/W
R/W
R/W
5
–
0
5
–
0
5
–
0
5
–
0
5
0
Atmel ATmega16/32/64/M1/C1
PMODE
R/W
R/W
R/W
R/W
R/W
POCRnSA[7:0]
POCRnRA[7:0]
POCRnSB[7:0]
POCRnRB[7:0]
4
–
0
4
–
0
4
–
0
4
–
0
4
0
POPB
R/W
R/W
R/W
R/W
R/W
3
0
3
0
3
0
3
0
3
0
POPA
POCRnRA[11:8]
POCRnSB[11:8]
R/W
POCRnRB[11:8]
POCRnSA[11:8]
R/W
R/W
R/W
R/W
2
0
2
0
2
0
2
0
2
0
R/W
R/W
R/W
R/W
R
1
0
1
0
1
0
1
0
1
0
-
R/W
R/W
R/W
R/W
R
0
0
0
0
0
0
0
0
0
0
-
POCRnSBH
POCRnSAH
POCRnRAH
POCRnRAL
POCR_RBH
POCRnSAL
POCR_RBL
OCRnSBL
PCNF
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