ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 156
ATMEGA64M1-15MZ
Manufacturer Part Number
ATMEGA64M1-15MZ
Description
MCU AVR 64KB FLASH 3PSC 32-VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA64M1-15MZ.pdf
(367 pages)
Specifications of ATMEGA64M1-15MZ
Package / Case
32-VQFN
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Eeprom Size
2K x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
4K x 8
Program Memory Size
64KB (64K x 8)
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Connectivity
CAN, LIN, SPI, UART/USART
Core Size
8-Bit
Processor Series
ATMEGA64x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Lead Free Status / Rohs Status
Details
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14.16.10 PSC Interrupt Mask Register – PIM
156
Atmel ATmega16/32/64/M1/C1
Table 14-12. Input Mode Operation
Bit
Read/Write
Initial Value
• Bit 7:4 – not use
not use.
• Bit 3 – PEVE2 : PSC External Event 2 Interrupt Enable
When this bit is set, an external event which can generates a a fault on module 2 generates
also an interrupt.
• Bit 2 – PEVE1 : PSC External Event 1 Interrupt Enable
When this bit is set, an external event which can generates a fault on module 1 generates also
an interrupt.
• Bit 1 – PEVE0 : PSC External Event 0 Interrupt Enable
When this bit is set, an external event which can generates a fault on module 0 generates also
an interrupt.
• Bit 0 – PEOPE : PSC End Of Cycle Interrupt Enable
When this bit is set, an interrupt is generated when PSC reaches the end of the whole cycle.
PRFMn2:0
000b
001b
010b
011b
10x
11xb
R
7
0
-
Description
No action, PSC Input is ignored
Disactivate module n Outputs A
Disactivate module n Output B
Disactivate module n Output A & B
Disactivate all PSC Output
Halt PSC and Wait for Software Action
R
6
0
-
R
5
0
-
R
4
0
-
PEVE2
R/W
3
0
PEVE1
R/W
2
0
PEVE0
R/W
1
0
PEOPE
R/W
0
0
7647G–AVR–09/11
PIM
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