ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 182

• Manufacturer Part Number: ATMEGA64M1-15MZ
• Description: MCU AVR 64KB FLASH 3PSC 32-VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64M1-15MZ

• Package / Case: 32-VQFN
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Eeprom Size: 2K x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Connectivity: CAN, LIN, SPI, UART/USART
• Core Size: 8-Bit
• Processor Series: ATMEGA64x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Lead Free Status / Rohs Status: Details

16.6
16.6.1
16.6.2
16.6.3
16.6.4
182
CAN Timer
Atmel ATmega16/32/64/M1/C1
Prescaler
16-bit Timer
Time Triggering
Stamping Message
A programmable 16-bit timer is used for message stamping and time trigger communication
(TTC).
Figure 16-11. CAN Timer Block Diagram
An 8-bit prescaler is initialized by CANTCON register. It receives the clk
by 8. It provides clk
T
This timer starts counting from 0x0000 when the CAN controller is enabled (ENFG bit). When
the timer rolls over from 0xFFFF to 0x0000, an interrupt is generated (OVRTIM).
Two synchronization modes are implemented for TTC (TTC bit):
In TTC mode, a frame is sent once, even if an error occurs.
The capture of the timer value is done in the MOb which receives or sends the frame. All man-
aged MOb are stamped, the stamping of a received (sent) frame occurs on RxOk (TXOK).
clk
RXOK[i]
TXOK[i]
CANTIM
clk
– synchronization on Start of Frame (SYNCTTC=0),
– synchronization on End of Frame (SYNCTTC=1).
IO
=
OVRTIM
T
clk
IO
8
CANTIM
x 8 x (CANTCON [7:0] + 1)
CANSTM[i]
overrun
frequency to the CAN Timer if the CAN controller is enabled.
CANTCON
CANTIM
clk
CANTIM
ENFG
CANTTC
TTC
IO
frequency divided
SYNCTTC
7647G–AVR–09/11
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