ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 160
ATMEGA64M1-15MZ
Manufacturer Part Number
ATMEGA64M1-15MZ
Description
MCU AVR 64KB FLASH 3PSC 32-VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA64M1-15MZ.pdf
(367 pages)
Specifications of ATMEGA64M1-15MZ
Package / Case
32-VQFN
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Eeprom Size
2K x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
4K x 8
Program Memory Size
64KB (64K x 8)
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Connectivity
CAN, LIN, SPI, UART/USART
Core Size
8-Bit
Processor Series
ATMEGA64x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Lead Free Status / Rohs Status
Details
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Atmel ATmega16/32/64/M1/C1
When the SPI is enabled, the data direction of the MOSI, MISO, SCK, and SS pins is overrid-
den according to
Port Functions” on page
Table 15-1.
Note:
The following code examples show how to initialize the SPI as a Master and how to perform a
simple transmission.
DDR_SPI in the examples must be replaced by the actual Data Direction Register controlling
the SPI pins. DD_MOSI, DD_MISO and DD_SCK must be replaced by the actual data direc-
tion bits for these pins. E.g. if MOSI is placed on pin PB2, replace DD_MOSI with DDB2 and
DDR_SPI with DDRB.
MOSI
MISO
SCK
Pin
SS
1. See
direction of the user defined SPI pins.
SPI Pin Overrides
“Alternate Functions of Port B” on page 69
Direction, Master SPI
User Defined
Input
User Defined
User Defined
Table
15-1. For more details on automatic port overrides, refer to
67.
(1)
for a detailed description of how to define the
Direction, Slave SPI
Input
User Defined
Input
Input
7647G–AVR–09/11
“Alternate
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