ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 214

• Manufacturer Part Number: ATMEGA64M1-15MZ
• Description: MCU AVR 64KB FLASH 3PSC 32-VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64M1-15MZ

• Package / Case: 32-VQFN
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Eeprom Size: 2K x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Connectivity: CAN, LIN, SPI, UART/USART
• Core Size: 8-Bit
• Processor Series: ATMEGA64x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Lead Free Status / Rohs Status: Details

17.5.5.2
17.5.6
17.5.6.1
214
Atmel ATmega16/32/64/M1/C1
Bit Timing
Busy Signal in UART Mode
Baud rate Generator
When the busy signal is set, some registers are locked, user writing is not allowed:
If the busy signal is set, the only available commands are:
Note that, if another command is entered during busy signal, the new command is not vali-
dated and the LOVRERR bit flag of the LINERR register is set. The on-going transfer is not
interrupted.
During the byte transmission, the busy signal is set. This locks some registers from being
written:
The busy signal is not generated during a byte reception.
The baud rate is defined to be the transfer rate in bits per second (bps):
Equation for calculating baud rate:
Equation for setting LINDIV value:
Note that in reception a majority vote on three samplings is made.
• “LIN Control Register” - LINCR - except LCMD[2..0], LENA & LSWRES,
• “LIN Baud Rate Registers” - LINBRRL & LINBRRH,
• “LIN Data Length Register” - LINDLR,
• “LIN Identifier Register” - LINIDR,
• “LIN Data Register” - LINDAT.
• LCMD[1..0] = 00
• LENA = 0 and/or LCMD[2] = 0, the kill command is taken into account immediately,
• LSWRES = 1, the reset command is taken into account immediately.
• “LIN Control Register” - LINCR - except LCMD[2..0], LENA & LSWRES,
• “LIN Data Register” - LINDAT.
• BAUD: Baud rate (in bps),
•
• LDIV[11..0]: Contents of LINBRRH & LINBRRL registers - (0-4095), the pre-scaler
• LBT[5..0]: Least significant bits of - LINBTR register- (0-63) is the number of samplings in a
f
receives clk
LIN or UART bit (default value 32).
clk
i/o
: System I/O clock frequency,
i/o
as input clock.
b
, the abort command is taken into account at the end of the byte,
BAUD =
LDIV[11..0] = (
f
clk
i/o
/ LBT[5..0] x (LDIV[11..0] + 1)
f
clk
i/o
/ LBT[5..0] x BAUD ) - 1
7647G–AVR–09/11