ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 20
ATMEGA64M1-15MZ
Manufacturer Part Number
ATMEGA64M1-15MZ
Description
MCU AVR 64KB FLASH 3PSC 32-VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA64M1-15MZ.pdf
(367 pages)
Specifications of ATMEGA64M1-15MZ
Package / Case
32-VQFN
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Eeprom Size
2K x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
4K x 8
Program Memory Size
64KB (64K x 8)
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Connectivity
CAN, LIN, SPI, UART/USART
Core Size
8-Bit
Processor Series
ATMEGA64x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Lead Free Status / Rohs Status
Details
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- Download datasheet (7Mb)
4. Memories
4.1
20
In-System Reprogrammable Flash Program Memory
Atmel ATmega16/32/64/M1/C1
This section describes the different memories in the ATmega16/32/64/M1/C1. The AVR archi-
tecture has two main memory spaces, the Data Memory and the Program Memory space. In
addition, the ATmega16/32/64/M1/C1 features an EEPROM Memory for data storage. All
three memory spaces are linear and regular.
The ATmega16/32/64/M1/C1 contains 16K/32K/64K bytes On-chip In-System Reprogramma-
ble Flash memory for program storage. Since all AVR instructions are 16 or 32 bits wide, the
Flash is organized as 8K x 16, 16K x 16 , 32K x 16. For software security, the Flash Program
memory space is divided into two sections, Boot Program section and Application Program
section.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The
ATmega16/32/64/M1/C1 Program Counter (PC) is 14/15 bits wide, thus addressing the
8K/16K/32K program memory locations. The operation of Boot Program section and associ-
ated Boot Lock bits for software protection are described in detail in
Read-While-Write Self-Programming ATmega16/32/64/M1/C1” on page
gramming” on page 296
Parallel programming mode.
Constant tables can be allocated within the entire program memory address space (see the
LPM – Load Program Memory.
Timing diagrams for instruction fetch and execution are presented in
Timing” on page
Figure 4-1.
Program Memory Map
17.
Application F lash Sec t ion
Boot Flash S e ction
Program Memory
contains a detailed description on Flash programming in SPI or
0x0000
0x1FFF/0x3FFF/0x7F
“Boot Loader Support –
“Instruction Execution
279.
“Memory Pro-
7647G–AVR–09/11
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