ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 177
ATMEGA64M1-15MZ
Manufacturer Part Number
ATMEGA64M1-15MZ
Description
MCU AVR 64KB FLASH 3PSC 32-VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA64M1-15MZ.pdf
(367 pages)
Specifications of ATMEGA64M1-15MZ
Package / Case
32-VQFN
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Eeprom Size
2K x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
4K x 8
Program Memory Size
64KB (64K x 8)
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Connectivity
CAN, LIN, SPI, UART/USART
Core Size
8-Bit
Processor Series
ATMEGA64x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Lead Free Status / Rohs Status
Details
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16.4.3
16.4.4
16.4.5
7647G–AVR–09/11
Notes: 1. Phase error < 0
Baud Rate
Fault Confinement
Overload Frame
5. Synchronization Segment: SYNS
2. Phase error > 0
3. Phase error > 0
4. Phase error < 0
Tsyns=1
x
Tscl (
CLK
Figure 16-8. General Structure of a Bit Period
With no baud rate prescaler (BRP[5..0]=0) the sampling point comes one time quantum too
early. This leads to a fail according the ISO16845 Test plan. It is necessary to lengthen the
Phase Segment 1 by one time quantum and to shorten the Phase Segment 2 by one time
quantum to compensate.
The baud rate selection is made by T
Notes:
(c.f.
An overload frame is sent by setting an overload request (OVRQ). After the next reception, the
CAN channel sends an overload frame in accordance with the CAN specification. A status or
flag is set (OVRF) as long as the overload frame is sent.
fixed
F
Data
1. Tsyns = 1 x Tscl = (BRP[5..0]+ 1)/clk
2. Tprs = (1 to 8) x Tscl = (PRS[2..0]+ 1) x Tscl
3. Tphs1 = (1 to 8) x Tscl = (PHS1[2..0]+ 1) x Tscl
4. Tphs2 = (1 to 8) x Tscl = (PHS2[2..0]
5. Tsjw = (1 to 4) x Tscl = (SJW[1..0]+ 1) x Tscl
CAN
)
IO
Section 16.7 “Error Management” on page
1. The total number of Tscl (Time Quanta) in a bit time must be from 8 to 25.
2. PHS2[2..0] 2 is programmable to be PHS1[2..0] and
Tsyns(5)
Tbit
(1)
1
/
CLK
= Tsyns + Tprs + Tphs1 + Tphs2
IO
Tscl (TQ)
Tprs
Atmel ATmega16/32/64/M1/C1
bit
Bit Rate Prescaler
calculation:
one nominal bit
IO
(2)
Tbit
+ 1) x Tscl
(= 1TQ)
183).
Tphs1+Tsjw
Tphs1
or
(
1
)
1.
(
3
Sample
)
Point
Tphs2+Tsjw
Tphs2
or
Transmission
(
2
)
(
4
)
Point
177
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