ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 23
ATMEGA64M1-15MZ
Manufacturer Part Number
ATMEGA64M1-15MZ
Description
MCU AVR 64KB FLASH 3PSC 32-VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA64M1-15MZ.pdf
(367 pages)
Specifications of ATMEGA64M1-15MZ
Package / Case
32-VQFN
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Eeprom Size
2K x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
4K x 8
Program Memory Size
64KB (64K x 8)
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Connectivity
CAN, LIN, SPI, UART/USART
Core Size
8-Bit
Processor Series
ATMEGA64x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Lead Free Status / Rohs Status
Details
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- Download datasheet (7Mb)
4.3.2
4.3.3
4.3.4
7647G–AVR–09/11
The EEPROM Address Registers – EEARH and EEARL
The EEPROM Data Register – EEDR
The EEPROM Control Register – EECR
• Bits 15.11 – Reserved Bits
These bits are reserved bits in the ATmega16/32/64/M1/C1 and will always read as zero.
• Bits 9..0 – EEAR10..0: EEPROM Address
The EEPROM Address Registers – EEARH and EEARL specify the EEPROM address in the
512/1024/2048 bytes EEPROM space. The EEPROM data bytes are addressed linearly
between 0 and 511/1023/2047. The initial value of EEAR is undefined. A proper value must be
written before the EEPROM may be accessed.
• Bits 7..0 – EEDR7.0: EEPROM Data
For the EEPROM write operation, the EEDR Register contains the data to be written to the
EEPROM in the address given by the EEAR Register. For the EEPROM read operation, the
EEDR contains the data read out from the EEPROM at the address given by EEAR.
• Bits 7..6 – Reserved Bits
These bits are reserved bits in the ATmega16/32/64/M1/C1 and will always read as zero.
• Bits 5..4 – EEPM1 and EEPM0: EEPROM Programming Mode Bits
The EEPROM Programming mode bit setting defines which programming action that will be
triggered when writing EEWE. It is possible to program data in one atomic operation (erase
the old value and program the new value) or to split the Erase and Write operations in two dif-
ferent operations. The Programming times for the different modes are shown in
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
EEAR7
EEDR7
R/W
R/W
15
R
X
R
–
7
0
7
0
7
–
0
EEAR6
EEDR6
R/W
R/W
14
R
X
–
6
0
R
6
0
6
–
0
EEAR5
EEDR5
EEPM1
R/W
R/W
R/W
13
R
X
–
5
0
5
0
5
X
Atmel ATmega16/32/64/M1/C1
EEAR4
EEPM0
EEDR4
R/W
R/W
R/W
12
R
X
–
4
0
X
4
0
4
EEAR3
EEDR3
EERIE
R/W
R/W
R/W
11
R
–
3
0
X
3
0
3
0
EEAR10
EEMWE
EEDR2
EEAR2
R/W
R/W
R/W
R/W
10
2
0
X
2
0
2
X
EEDR1
EEAR9
EEAR1
EEWE
R/W
R/W
R/W
R/W
1
0
X
1
X
X
9
1
EEDR0
EEAR8
EEAR0
EERE
R/W
R/W
R/W
R/W
0
0
0
0
8
0
X
X
EEARH
EEDR
EEARL
EECR
Table 4-1 on
23
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