ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 66

• Manufacturer Part Number: ATMEGA64M1-15MZ
• Description: MCU AVR 64KB FLASH 3PSC 32-VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64M1-15MZ

• Package / Case: 32-VQFN
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Eeprom Size: 2K x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Connectivity: CAN, LIN, SPI, UART/USART
• Core Size: 8-Bit
• Processor Series: ATMEGA64x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Lead Free Status / Rohs Status: Details

9.2.5
66
Atmel ATmega16/32/64/M1/C1
Digital Input Enable and Sleep Modes
The following code example shows how to set port B pins 0 and 1 high, 2 and 3 low, and
define the port pins from 4 to 7 as input with pull-ups assigned to port pins 6 and 7. The result-
ing pin values are read back again, but as previously discussed, a nop instruction is included
to be able to read back the value recently assigned to some of the pins.
Note:
As shown in
schmitt-trigger. The signal denoted SLEEP in the figure, is set by the MCU Sleep Controller in
Power-down mode, Power-save mode, and Standby mode to avoid high power consumption if
some input signals are left floating, or have an analog signal level close to V
SLEEP is overridden for port pins enabled as external interrupt pins. If the external interrupt
request is not enabled, SLEEP is active also for these pins. SLEEP is also overridden by vari-
ous other alternate functions as described in
If a logic high level (“one”) is present on an Asynchronous External Interrupt pin configured as
“Interrupt on Rising Edge, Falling Edge, or Any Logic Change on Pin” while the external inter-
rupt is not enabled, the corresponding External Interrupt Flag will be set when resuming from
the above mentioned sleep modes, as the clamping in these sleep modes produces the
requested logic change.
Assembly Code Example
C Code Example
unsigned char i;
...
; Define pull-ups and set outputs high
; Define directions for port pins
ldi
ldi
out
out
; Insert nop for synchronization
nop
; Read port pins
in
...
...
/* Define pull-ups and set outputs high */
/* Define directions for port pins */
PORTB = (1<<PB7)|(1<<PB6)|(1<<PB1)|(1<<PB0);
DDRB = (1<<DDB3)|(1<<DDB2)|(1<<DDB1)|(1<<DDB0);
/* Insert nop for synchronization*/
_NOP();
/* Read port pins */
i = PINB;
...
1. For the assembly program, two temporary registers are used to minimize the time from
pull-ups are set on pins 0, 1, 6, and 7, until the direction bits are correctly set, defining bit 2
and 3 as low and redefining bits 0 and 1 as strong high drivers.
Figure
r16, (1<<PB7)|(1<<PB6)|(1<<PB1)|(1<<PB0)
r17, (1<<DDB3)|(1<<DDB2)|(1<<DDB1)|(1<<DDB0)
PORTB, r16
DDRB, r17
r16, PINB
9-2, the digital input signal can be clamped to ground at the input of the
(1)
“Alternate Port Functions” on page
CC
/2.
7647G–AVR–09/11
67.