ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 228

• Manufacturer Part Number: ATMEGA64M1-15MZ
• Description: MCU AVR 64KB FLASH 3PSC 32-VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64M1-15MZ

• Package / Case: 32-VQFN
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Eeprom Size: 2K x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Connectivity: CAN, LIN, SPI, UART/USART
• Core Size: 8-Bit
• Processor Series: ATMEGA64x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Lead Free Status / Rohs Status: Details

17.6.7
17.6.8
228
Atmel ATmega16/32/64/M1/C1
LIN Data Length Register - LINDLR
LIN Identifier Register - LINIDR
• Bits 7:4 - LTXDL[3:0]: LIN Transmit Data Length
• Bits 3:0 - LRXDL[3:0]: LIN Receive Data Length
• Bits 7:6 - LP[1:0]: Parity
• Bits 5:4 - LDL[1:0]: LIN 1.3 Data Length
• Bits 3:0 - LID[3:0]: LIN 1.3 Identifier
• Bits 5:0 - LID[5:0]: LIN 2.1 Identifier
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
– 00 = 2-byte response,
– 01 = 2-byte response,
– 10 = 4-byte response,
– 11 = 8-byte response.
In LIN mode, this field gives the number of bytes to be transmitted (clamped to 8 Max).
In UART mode this field is unused.
In LIN mode, this field gives the number of bytes to be received (clamped to 8 Max).
In UART mode this field is unused.
In LIN mode:
In UART mode this field is unused.
In LIN 1.3 mode:
In UART mode this field is unused.
In LIN 1.3 mode: 4-bit identifier.
In UART mode this field is unused.
In LIN 2.1 mode: 6-bit identifier (no length transported).
In UART mode this field is unused.
LTXDL3
LP1
R/W
R
7
0
7
0
LP0 = LID4 ^ LID2 ^ LID1 ^ LID0
LP1 = ! ( LID1 ^ LID3 ^ LID4 ^ LID5 )
LP0
LTXDL2
R
6
0
R/W
6
0
LID5 / LDL1
LTXDL1
R/W
R/W
5
0
5
0
LTXDL0
LID4 / LDL0
R/W
4
0
R/W
4
0
LRXDL3
R/W
3
0
LID3
R/W
3
0
LRXDL2
R/W
2
0
LID2
R/W
2
0
LRXDL1
R/W
1
0
LID1
R/W
1
0
LRXDL0
R/W
0
0
LID0
R/W
7647G–AVR–09/11
0
0
LINDLR
LINIDR