DF3048X16V Renesas Electronics America, DF3048X16V Datasheet - Page 420

MCU 5V 128K,PB-FREE 100-TQFP

DF3048X16V

Manufacturer Part Number
DF3048X16V
Description
MCU 5V 128K,PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of DF3048X16V

Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF3048X16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 10 16-Bit Integrated Timer Unit (ITU)
10.5.3
Each ITU channel can generate a compare match/input capture A interrupt, a compare match/input
capture B interrupt, and an overflow interrupt. In total there are 15 interrupt sources, all
independently vectored. An interrupt is requested when the interrupt request flag and interrupt
enable bit are both set to 1.
The priority order of the channels can be modified in interrupt priority registers A and B (IPRA
and IPRB). For details see section 5, Interrupt Controller.
Compare match/input capture A interrupts in channels 0 to 3 can activate the DMA controller
(DMAC). When the DMAC is activated a CPU interrupt is not requested.
Table 10.10 lists the interrupt sources.
Table 10.10 ITU Interrupt Sources
Channel
0
1
2
3
4
Note: * The priority immediately after a reset is indicated. Inter-channel priorities can be changed
Rev. 7.00 Sep 21, 2005 page 394 of 878
REJ09B0259-0700
by settings in IPRA and IPRB.
Interrupt Sources and DMA Controller Activation
Interrupt
Source
IMIA0
IMIB0
OVI0
IMIA1
IMIB1
OVI1
IMIA2
IMIB2
OVI2
IMIA3
IMIB3
OVI3
IMIA4
IMIB4
OVI4
Description
Compare match/input capture A0
Compare match/input capture B0
Overflow 0
Compare match/input capture A1
Compare match/input capture B1
Overflow 1
Compare match/input capture A2
Compare match/input capture B2
Overflow 2
Compare match/input capture A3
Compare match/input capture B3
Overflow 3
Compare match/input capture A4
Compare match/input capture B4
Overflow 4
DMAC
Activatable
Yes
No
No
Yes
No
No
Yes
No
No
Yes
No
No
No
No
No
Priority*
High
Low

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