DF3048X16V Renesas Electronics America, DF3048X16V Datasheet - Page 847
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DF3048X16V
Manufacturer Part Number
DF3048X16V
Description
MCU 5V 128K,PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Specifications of DF3048X16V
Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF3048X16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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SSR—Serial Status Register
Transmit data register empty
Note: Only 0 can be written, to clear the flag.
0
1
Receive data register full
Bit
Initial value
Read/Write
0
1
[Clearing conditions]
Read TDRE when TDRE = 1, then write 0 in TDRE.
The DMAC writes data in TDR.
[Setting conditions]
Reset or transition to standby mode.
TE is 0 in SCR
Data is transferred from TDR to TSR, enabling new
data to be written in TDR.
*
[Clearing conditions]
Reset or transition to standby mode.
Read RDRF when RDRF = 1, then write 0 in
RDRF.
The DMAC reads data from RDR.
[Setting condition]
Serial data is received normally and transferred
from RSR to RDR
Framing error (for SCI0)
0
1
Parity error
[Clearing conditions]
Reset or transition to standby mode.
Read FER when FER = 1, then write 0 in FER.
[Setting condition]
Framing error (stop bit is 0)
0
1
[Clearing conditions]
Reset or transition to standby mode.
Read PER when PER = 1, then write 0
in PER.
[Setting condition]
Parity error: (parity of receive data does
not match parity setting O/E bit in SMR)
R/(W)
TDRE
7
1
*
R/(W)
RDRF
6
0
*
Multiprocessor bit
0
1
ORER
R/(W)
Multiprocessor bit value in
receive data is 0
Multiprocessor bit value in
receive data is 1
5
0
*
FER/ERS
R/(W)
4
0
Error signal status (for smart card interface)
Transmit end
Overrun error
0
1
0
1
0
1
*
[Clearing conditions]
Reset or transition to standby mode.
Read ERS when ERS = 1, then write 0 in ERS.
[Setting condition]
A low error signal is received.
[Clearing conditions]
Read TDRE when TDRE = 1, then write 0 in TDRE.
The DMAC writes data in TDR.
[Setting conditions]
Reset or transition to standby mode.
TE is cleared to 0 in SCR and FER/ERS is
cleared to 0.
TDRE is 1 when last bit of 1-byte serial character
is transmitted.
[Clearing conditions]
Reset or transition to standby mode.
Read ORER when ORER = 1, then write 0 in
ORER.
[Setting condition]
Overrun error (reception of next serial data
ends when RDRF = 1)
Rev. 7.00 Sep 21, 2005 page 821 of 878
R/(W)
PER
3
0
*
Appendix B Internal I/O Register
H'B4
Multiprocessor bit transfer
TEND
0
1
R
2
1
Multiprocessor bit value in
transmit data is 0
Multiprocessor bit value in
transmit data is 1
MPB
REJ09B0259-0700
R
1
0
MPBT
R/W
0
0
SCI0
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