DF3048X16V Renesas Electronics America, DF3048X16V Datasheet - Page 699

MCU 5V 128K,PB-FREE 100-TQFP

DF3048X16V

Manufacturer Part Number
DF3048X16V
Description
MCU 5V 128K,PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of DF3048X16V

Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF3048X16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
21.5
21.5.1
Regardless of its current state, the chip enters hardware standby mode whenever the STBY pin
goes low. Hardware standby mode reduces power consumption drastically by halting all functions
of the CPU, DMAC, refresh controller, and on-chip supporting modules. All modules are reset
except the on-chip RAM. As long as the specified voltage is supplied, on-chip RAM data is
retained. I/O ports are placed in the high-impedance state.
Clear the RAME bit to 0 in SYSCR before STBY goes low to retain on-chip RAM data.
The inputs at the mode pins (MD2 to MD0) should not be changed during hardware standby
mode.
21.5.2
Hardware standby mode is exited by inputs at the STBY and RES pins. While RES is low, when
STBY goes high, the clock oscillator starts running. RES should be held low long enough for the
clock oscillator to settle. When RES goes high, reset exception handling begins, followed by a
transition to the program execution state.
21.5.3
Figure 21.2 shows the timing relationships for hardware standby mode. To enter hardware standby
mode, first drive RES low, then drive STBY low. To exit hardware standby mode, first drive
STBY high, wait for the clock to settle, then bring RES from low to high.
Hardware Standby Mode
Transition to Hardware Standby Mode
Exit from Hardware Standby Mode
Timing for Hardware Standby Mode
Rev. 7.00 Sep 21, 2005 page 673 of 878
Section 21 Power-Down State
REJ09B0259-0700

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