DF3048X16V Renesas Electronics America, DF3048X16V Datasheet - Page 448

MCU 5V 128K,PB-FREE 100-TQFP

DF3048X16V

Manufacturer Part Number
DF3048X16V
Description
MCU 5V 128K,PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of DF3048X16V

Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF3048X16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 11 Programmable Timing Pattern Controller
11.2.8
NDERB is an 8-bit readable/writable register that enables or disables TPC output groups 3 and 2
(TP
If a bit is enabled for TPC output by NDERB, then when the ITU compare match event selected in
the TPC output control register (TPCR) occurs, the NDRB value is automatically transferred to the
corresponding PBDR bit, updating the output value. If TPC output is disabled, the bit value is not
transferred from NDRB to PBDR and the output value does not change.
NDERB is initialized to H'00 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bits 7 to 0—Next Data Enable 15 to 8 (NDER15 to NDER8): These bits enable or disable TPC
output groups 3 and 2 (TP
Rev. 7.00 Sep 21, 2005 page 422 of 878
REJ09B0259-0700
Bits 7 to 0:
NDER15 to NDER8
0
1
Bit
Initial value
Read/Write
15
to TP
Next Data Enable Register B (NDERB)
8
) on a bit-by-bit basis.
NDER15
R/W
7
0
Description
TPC outputs TP
(NDR15 to NDR8 are not transferred to PB
TPC outputs TP
(NDR15 to NDR8 are transferred to PB
15
NDER14
to TP
R/W
6
0
8
) on a bit-by-bit basis.
NDER13
R/W
15
15
5
0
to TP
to TP
Next data enable 15 to 8
These bits enable or disable
TPC output groups 3 and 2
NDER12
8
8
R/W
are disabled
are enabled
4
0
NDER11
R/W
3
0
7
to PB
NDER10
7
to PB
R/W
2
0
0
)
0
)
NDER9
R/W
1
0
(Initial value)
NDER8
R/W
0
0

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