HD6417750SF200V Renesas Electronics America, HD6417750SF200V Datasheet - Page 1145

• Manufacturer Part Number: HD6417750SF200V
• Description: MPU 3V 16K PB-FREE 208-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750SF200V

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 2.07 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

This LSI incorporates an on-chip buffer for holding instructions that have been read ahead of their
execution (prefetching of instructions). Therefore, do not allocate programs to memory in such a
way that instructions are in the last 20 bytes of any memory space. If a program is allocated in
such a way, the prefetching of instructions may lead to a bus access for reading an instruction from
beyond the memory space. The following shows a case in which such bus access is a problem.
Figure G.1 depicts a case in which the instruction (ADD) indicated by the program counter and the
instruction at the address H'04000002 are fetched simultaneously. The program is assumed to
branch to a region other than area 1 after the subsequent JMP instruction and delay slot instruction
have been executed.
In this case, a bus access to area 1 (instruction prefetch), which is not visible in the program flow,
may occur.
1. Side effects of the prefetching of instructions
2. Methods of preventing the invalid prefetching of instructions
Appendix G Prefetching of Instructions and its Side Effects
a. An external bus access caused by an instruction prefetch may cause malfunctions in
b. If no device responds to an external bus request that is triggered by an instruction prefetch,
a. Use an MMU.
b. Do not allocate programs so that they run into the last 20-byte region of any memory space.
external devices, such as FIFOs, that are connected to the region accessed.
execution may hang.
Area 0
Area 1
H'03FFFFF8
H'03FFFFFA
H'03FFFFFC
H'03FFFFFE
H'04000000
H'04000002
Address
Figure G.1 Instruction Prefetch
ADD R1,R4
JMP @R2
NOP
NOP
Appendix G Prefetching of Instructions and its Side Effects
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Rev.7.00 Oct. 10, 2008 Page 1059 of 1074
PC (Program counter)
Address of instruction for prefetching
REJ09B0366-0700