HD6417750SF200V Renesas Electronics America, HD6417750SF200V Datasheet - Page 154

• Manufacturer Part Number: HD6417750SF200V
• Description: MPU 3V 16K PB-FREE 208-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750SF200V

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 2.07 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 2 Programming Model
contents of the vector base address and the vector offset. See section 5, Exceptions, for more
information on resets, general exceptions, and interrupts.
Program Execution State: In this state the CPU executes program instructions in sequence.
Power-Down State: In the power-down state, CPU operation halts and power consumption is
reduced. The power-down state is entered by executing a SLEEP instruction. There are two modes
in the power-down state: sleep mode and standby mode. For details, see section 9, Power-Down
Modes.
Bus-Released State: In this state the CPU has released the bus to a device that requested it.
Transitions between the states are shown in figure 2.6.
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Interrupt
From any state when
RESET = 0 and MRESET = 1
Bus request
Bus-released state
Figure 2.6 Processor State Transitions
Bus request
clearance
Power-on reset state
Bus request
Sleep mode
SLEEP instruction
with STBY bit
cleared
Bus
request
RESET = 1,
MRESET = 1
Bus request
Bus request
clearance
clearance
RESET = 0 and MRESET = 0
Exception-handling state
Program execution state
Exception
interrupt
RESET = 0,
MRESET = 1
End of exception
transition
processing
RESET = 1,
MRESET = 0
SLEEP instruction
with STBY bit set
Manual reset state
Standby mode
Power-down state
Reset state
Interrupt