HD6417750SF200V Renesas Electronics America, HD6417750SF200V Datasheet - Page 474

• Manufacturer Part Number: HD6417750SF200V
• Description: MPU 3V 16K PB-FREE 208-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750SF200V

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 2.07 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 13 Bus State Controller (BSC)
13.2.5
Wait control register 1 (WCR1) is a 32-bit readable/writable register that specifies the number of
idle state insertion cycles for each area. With some kinds of memory, data bus drive does not go
off immediately after the read signal from off-chip goes off. As a result, there is a possibility of a
data bus collision when consecutive memory accesses are performed on memory in different areas,
or when a memory write is performed immediately after a read. In this LSI, the number of idle
cycles set in the WCR1 register are inserted automatically if there is a possibility of this kind of
data bus collision.
WCR1 is initialized to H'77777777 by a power-on reset, but is not initialized by a manual reset or
in standby mode.
Rev.7.00 Oct. 10, 2008 Page 388 of 1074
REJ09B0366-0700
Initial value:
Initial value:
Initial value:
Initial value:
Wait Control Register 1 (WCR1)
R/W:
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
Bit:
31
23
15
—
—
—
—
R
R
R
R
0
0
0
7
0
DMAIW2 DMAIW1 DMAIW0
A5IW2
A3IW2
A1IW2
R/W
R/W
R/W
R/W
30
22
14
1
1
1
6
1
A5IW1
A3IW1
A1IW1
R/W
R/W
R/W
R/W
29
21
13
1
1
1
5
1
A5IW0
A3IW0
A1IW0
R/W
R/W
R/W
R/W
28
20
12
1
1
1
4
1
27
19
11
—
—
—
—
R
R
R
R
0
0
0
3
0
A6IW2
A4IW2
A2IW2
A0IW2
R/W
R/W
R/W
R/W
26
18
10
1
1
1
2
1
A6IW1
A4IW1
A2IW1
A0IW1
R/W
R/W
R/W
R/W
25
17
1
1
9
1
1
1
A6IW0
A4IW0
A2IW0
A0IW0
R/W
R/W
R/W
R/W
24
16
1
1
8
1
0
1